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description: A detailed proposal for a Rust SIMD library called fearless_simd, building on the earlier &#x27;Towards fearless SIMD&#x27; blog post. The plan favors code generation...
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# A plan for SIMD

**[Linebender](https://daily.dev/sources/linebender)** · 12 min read · 0 upvotes · 0 comments

## Summary

A detailed proposal for a Rust SIMD library called fearless_simd, building on the earlier 'Towards fearless SIMD' blog post. The plan favors code generation over declarative macros to reduce compile times while supporting a full cartesian product of SIMD widths (64-512 bits), integer/float types, and f16 where available. It discusses explicit vs variable-width programming, favors 256-bit as a sweet spot for most workloads, addresses AVX-512's double-pumped reality on most chips, compares against pulp and Highway, and covers considerations for WASM SIMD, RVV/SVE scalable vectors, and small embedded SIMD extensions like Helium. The author invites community feedback via Zulip and GitHub before proceeding with implementation for Linebender's Vello renderer.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://linebender.org/blog/a-plan-for-simd>

## Questions this post answers

### What SIMD width should I target for portable Rust SIMD code across x86_64 and ARM?

256 bits is proposed as the sweet spot for Linebender's SIMD library. This matches the natural width of AVX-2, which covers the majority of x86_64 chips, and on Neon it unrolls without register pressure issues since ARM has 32 registers versus AVX-2's 16. Going to 512 bits offers little benefit since most shipping AVX-512 chips are double-pumped, processing 512-bit vectors in two clock cycles of 256 bits each.

_Developers weighing SIMD width tradeoffs can follow evolving Rust SIMD design discussions on daily.dev._

### When is AVX-512 support landing in stable Rust?

AVX-512 is expected to land in Rust 1.89 if things go well, according to an update tracked in a rust-lang GitHub pull request. Support for f16 on Neon is also being pursued, though its stabilization timeline is less certain and still being clarified through discussion on the Rust Zulip.

_Track Rust stabilization milestones like this on daily.dev before pinning a toolchain version._

### How does WASM SIMD handle runtime feature detection differently from x86 or ARM?

WASM lacks runtime feature detection entirely; instead, feature detection happens during content negotiation to decide which WASM blob to serve, since SIMD capabilities are fixed at compile time. Because of this, a runtime-detection abstraction like a Level enum compiles to zero runtime cost on WASM, even though it's still useful for writing code portable to other targets.

_Developers targeting WASM SIMD can weigh these deployment tradeoffs alongside other builds on daily.dev._

## Similar posts on daily.dev

- [SIMD programming in pure Rust](https://daily.dev/posts/simd-programming-in-pure-rust-idnkdlsse) · Hacker News · 2 upvotes · 0 comments

---

Tags: [#performance](https://daily.dev/tags/performance), [#rust](https://daily.dev/tags/rust), [#webassembly](https://daily.dev/tags/webassembly)

[View this post on daily.dev](https://daily.dev/posts/a-plan-for-simd-kemhuuvy0)

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