--- title: Achieving Single-Digit Microsecond Latency Inference for... description: NVIDIA achieved single-digit microsecond latency for LSTM inference on the GH200 Grace Hopper Superchip, matching or beating specialized FPGA hardware in the... canonical: https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: Achieving Single-Digit Microsecond Latency Inference for Capital Markets | daily.dev og:description: NVIDIA achieved single-digit microsecond latency for LSTM inference on the GH200 Grace Hopper Superchip, matching or beating specialized FPGA hardware in the... og:url: https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew og:image: https://api.daily.dev/og/posts/sruudGGEw.png og:image:alt: Achieving Single-Digit Microsecond Latency Inference for Capital Markets og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Achieving Single-Digit Microsecond Latency Inference for Capital Markets **[NVIDIA Developer](https://daily.dev/sources/nvidiadev)** · 13 min read · 0 upvotes · 0 comments ## Summary NVIDIA achieved single-digit microsecond latency for LSTM inference on the GH200 Grace Hopper Superchip, matching or beating specialized FPGA hardware in the STAC-ML Markets (Inference) Tacana benchmark. Key results include 4.61–4.70 µs p99 latency for LSTM_A and 6.88–7.10 µs for LSTM_B. The post details the custom CUDA kernel techniques behind these results: persistent kernels that keep weights in shared memory/registers, CUDA green contexts for multi-instance serving, GDRCopy for low-overhead CPU-GPU signaling, and a two-phase precompute/inference split. An open source reference implementation (dl-lowlat-infer) targeting the RTX PRO 6000 Blackwell GPU is provided with build and run instructions, achieving 2.5–14.2 µs p99 across small, medium, and large LSTM models. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Similar posts on daily.dev - [NVIDIA Blackwell Sets STAC-AI Record for LLM Inference in Finance](https://daily.dev/posts/nvidia-blackwell-sets-stac-ai-record-for-llm-inference-in-finance-vfvekpbs7) · NVIDIA Developer · 0 upvotes · 0 comments --- Tags: [#cuda](https://daily.dev/tags/cuda), [#lstm](https://daily.dev/tags/lstm) [View this post on daily.dev](https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"Achieving Single-Digit Microsecond Latency Inference for Capital Markets","url":"https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew"},"datePublished":"2026-04-02T16:34:35.908Z","dateModified":"2026-04-02T16:35:06.545Z","description":"NVIDIA achieved single-digit microsecond latency for LSTM inference on the GH200 Grace Hopper Superchip, matching or beating specialized FPGA hardware in the...","image":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/5dde846d424c126c261e701331e10b57?_a=AQAEuop","thumbnailUrl":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/5dde846d424c126c261e701331e10b57?_a=AQAEuop","isAccessibleForFree":true,"articleSection":"NVIDIA Developer","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"NVIDIA Developer","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/86e45aab42ba48ce83103d01b1119910","url":"https://daily.dev/sources/nvidiadev"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/achieving-single-digit-microsecond-latency-inference-for-capital-markets-sruudggew","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":0},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"cuda,lstm","timeRequired":"PT13M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"NVIDIA Developer","item":"https://daily.dev/sources/nvidiadev"},{"@type":"ListItem","position":3,"name":"Achieving Single-Digit Microsecond Latency Inference for Capital Markets"}]} ```