--- title: AMD Preparing PCIe TPH Support For Upcoming CPUs | daily.dev description: AMD is preparing PCIe TPH support for upcoming CPUs. TPH is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target... canonical: https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: AMD Preparing PCIe TPH Support For Upcoming CPUs | daily.dev og:description: AMD is preparing PCIe TPH support for upcoming CPUs. TPH is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target... og:url: https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr og:image: https://api.daily.dev/og/posts/lTXuxUUcR.png og:image:alt: AMD Preparing PCIe TPH Support For Upcoming CPUs og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # AMD Preparing PCIe TPH Support For Upcoming CPUs **[Phoronix](https://daily.dev/sources/phoronix)** · 1 min read · 0 upvotes · 0 comments ## Summary AMD is preparing PCIe TPH support for upcoming CPUs. TPH is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target memory space. Cache Injection, a technology targeted at networking and storage applications, leverages TPH to improve performance by reducing latency. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: --- Tags: [#linux](https://daily.dev/tags/linux), [#amd](https://daily.dev/tags/amd) [View this post on daily.dev](https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"AMD Preparing PCIe TPH Support For Upcoming CPUs","url":"https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr"},"datePublished":"2024-05-09T18:36:31.401Z","dateModified":"2024-05-09T18:36:30.935Z","description":"AMD is preparing PCIe TPH support for upcoming CPUs. TPH is a PCIe feature that allows endpoint devices to provide optimization hints for requests that target...","image":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/92677044a4ba843f3ffc3735c4f2647c?_a=AQAEuiZ","thumbnailUrl":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/92677044a4ba843f3ffc3735c4f2647c?_a=AQAEuiZ","isAccessibleForFree":true,"articleSection":"Phoronix","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"Phoronix","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/6a26ba379dd64932830aa0c9803dd7ee","url":"https://daily.dev/sources/phoronix"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/amd-preparing-pcie-tph-support-for-upcoming-cpus-ltxuxuucr","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":0},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"linux,amd","timeRequired":"PT1M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"Phoronix","item":"https://daily.dev/sources/phoronix"},{"@type":"ListItem","position":3,"name":"AMD Preparing PCIe TPH Support For Upcoming CPUs"}]} ```