--- title: "AMD Proposes New LLVM iTHP Option For Squeezing More Performance" url: https://daily.dev/posts/amd-proposes-new-llvm-ithp-option-for-squeezing-more-performance-u5vsicyny source_url: https://www.phoronix.com/news/LLVM-fenable-readonly-thp type: article source: "Phoronix" published: 2026-08-26T14:58:47.739Z updated: 2026-08-26T15:34:35.636Z tags: ["general-programming", "linux", "amd", "compiler-optimization"] reading_time: 3 upvotes: 0 comments: 0 language: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # AMD Proposes New LLVM iTHP Option For Squeezing More Performance **[Phoronix](https://daily.dev/sources/phoronix)** · 3 min read · 0 upvotes · 0 comments ## Summary AMD's compiler technologies team has proposed a new opt-in Clang feature, -fenable-readonly-thp, that implements instruction Transparent Huge Pages (iTHP) at compile and link time. The compiler driver arranges 2 MiB segment alignment at link time, links a small startup object, and calls madvise(MADV_COLLAPSE) at process start so the kernel can promote 4 KiB text page mappings to huge pages, reducing iTLB pressure. Testing with SPEC CPU 2026, Geekbench, CPython, and database/server workloads showed workload-dependent gains, strongest on large .text binaries like interpreters and compilers, with no broad regressions observed but some cost in larger binaries and startup overhead. The feature requires Linux 7.2 or newer since older kernels only support iTHP from TMPFS-based storage. Unlike the BOLT binary layout optimizer, this approach requires no workload profiling. A Google engineer noted they built a similar library, and AMD hopes to upstream this into LLVM and potentially GNU toolchains instead. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### What does the proposed -fenable-readonly-thp Clang option do? It implements instruction Transparent Huge Pages (iTHP) at compile and link time by arranging 2 MiB segment alignment during linking, linking a small startup object, and calling madvise(MADV_COLLAPSE) on the executable text range at process start so the kernel can promote 4 KiB page mappings to 2 MiB huge pages, reducing iTLB pressure for large binaries. _daily.dev surfaces compiler RFCs like this one for engineers tracking low-level performance tooling._ ### What are the downsides of using iTHP with the new Clang -fenable-readonly-thp flag? Binaries can become larger and there is small startup overhead from the madvise(MADV_COLLAPSE) call and additional link-time alignment requirements. Gains are workload-dependent, being strongest on large .text workloads like interpreters, simulators, and compiler-like binaries, while some workloads see no change; no broad regressions were observed in testing. _Engineers weighing compiler flag trade-offs can follow this kind of performance analysis on daily.dev._ ### What kernel version is required to use iTHP for executable text segments outside TMPFS storage? Linux 7.2 or newer is required for full iTHP support on executable text ranges, since older kernel versions only support iTHP when the executable is backed by TMPFS-based storage rather than regular file systems. _Keep track of kernel version requirements for performance features like this via daily.dev._ ## Similar posts on daily.dev - [Reserved THP Feature Proposed For Linux To Combine The Best Of HugeTLB & THP](https://daily.dev/posts/reserved-thp-feature-proposed-for-linux-to-combine-the-best-of-hugetlb-thp-cvgfdlm2n) · Phoronix · 0 upvotes · 0 comments - [Intel Xe Driver Preps THP Support For "Significant" SVM Performance Gains](https://daily.dev/posts/intel-xe-driver-preps-thp-support-for-significant-svm-performance-gains-0vfxktpzh) · Phoronix · 0 upvotes · 0 comments - [Glibc Now Enabling 2MB THP On AArch64 By Default For Better Performance](https://daily.dev/posts/glibc-now-enabling-2mb-thp-on-aarch64-by-default-for-better-performance-tnheepl8o) · Phoronix · 0 upvotes · 0 comments - [Experimental Linux Code For 1GB PUD-Level THPs Shows 34% Faster Memory Access Times](https://daily.dev/posts/experimental-linux-code-for-1gb-pud-level-thps-shows-34-faster-memory-access-times-tpbz1g571) · Phoronix · 0 upvotes · 0 comments - [Glibc Lands A Big Optimization For LoongArch CPUs](https://daily.dev/posts/glibc-lands-a-big-optimization-for-loongarch-cpus-2g3whuj3o) · Phoronix · 0 upvotes · 0 comments --- Tags: [#general-programming](https://daily.dev/tags/general-programming), [#linux](https://daily.dev/tags/linux), [#amd](https://daily.dev/tags/amd), [#compiler-optimization](https://daily.dev/tags/compiler-optimization) [View this post on daily.dev](https://daily.dev/posts/amd-proposes-new-llvm-ithp-option-for-squeezing-more-performance-u5vsicyny)