--- title: AMD’s Instinct MI455X: Aiming for the Sun | daily.dev description: AMD has unveiled the Instinct MI455X, its first GPU designed for rack-scale AI deployments, based on the new CDNA5 architecture. Key changes include a shift... canonical: https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: AMD’s Instinct MI455X: Aiming for the Sun | daily.dev og:description: AMD has unveiled the Instinct MI455X, its first GPU designed for rack-scale AI deployments, based on the new CDNA5 architecture. Key changes include a shift... og:url: https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl og:image: https://api.daily.dev/og/posts/WMT7vvmGl.png og:image:alt: AMD’s Instinct MI455X: Aiming for the Sun og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # AMD’s Instinct MI455X: Aiming for the Sun **[Hacker News](https://daily.dev/sources/hn)** · 7 min read · 0 upvotes · 0 comments ## Summary AMD has unveiled the Instinct MI455X, its first GPU designed for rack-scale AI deployments, based on the new CDNA5 architecture. Key changes include a shift from GCN-derived CDNA4 to an RDNA-based microarchitecture, with WGPs now featuring four dual-issue Wave32 SIMD32 units (up from single-issue Wave64 SIMD16), quadrupling VGPR addressability per wave. Each WGP delivers up to 65,536 FP4 matrix ops per cycle. The SoC features 192 MB Global L2 across two Fabric Cache Dies, 12 stacks of HBM4 totaling 432 GB at 23.3 TB/s bandwidth, and a new multicast load mechanism providing up to 4x bandwidth amplification for GEMM workloads. The accompanying Helios rackscale platform fits 72 MI455X GPUs in a single rack using UALink over Ethernet, delivering up to 2.9 EFLOP at MXFP4 and 31 TB of shared HBM4. This marks the end of AMD's 15-year GCN microarchitecture lineage for compute accelerators. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Community take How the wider developer community reacted, aggregated from 2 discussions and 60 comments across hackernews (as of 2026-07-25). **TL;DR:** The HN community is impressed by the raw specs but deeply skeptical about ROCm software maturity and the eye-watering $5.5M/rack price tag; there's cautious optimism that the RDNA-based architecture and SPIR-V adoption could finally improve the software story. **Sentiment:** 20% positive · 45% mixed · 35% skeptical **The case for** - The shift to RDNA-based microarchitecture and SPIR-V compilation may unify consumer and datacenter GPU software support, reducing the historical fragmentation problem. - Anthropic reportedly brought up AMD MI355 hardware with a single engineer over a weekend using AI-assisted tooling, suggesting the software onboarding barrier may be lower than expected. - The raw compute density (2.9 EFLOP/rack) and memory capacity (31 TB HBM4/rack) are genuinely staggering milestones. **The pushback** - ROCm is widely regarded as still immature and painful to use, with per-architecture build requirements and incomplete CUDA API coverage. - At ~$5.5M per rack, the hardware is accessible only to the largest hyperscalers and AI labs. - The Anthropic endorsement of easy bring-up was flagged as a PR statement from a party with a financial stake in AMD's success. - The CDNA5 architectural reset raises concerns about another multi-year wait before ROCm support stabilizes for the new platform. - HBM demand from these deployments is expected to keep RAM prices elevated. **By community** - hackernews (mixed): Commenters are awed by the specs but dominated by skepticism over ROCm software quality, price, and whether the RDNA architectural shift will actually improve the ecosystem or just reset the clock again. **Hottest debate:** Whether ROCm's software maturity has genuinely improved enough for production use, or whether the CDNA5 architectural reset means another years-long wait for a usable software stack. **Open questions** - Will the SPIR-V / 'The Rock' software stack actually deliver on compile-once JIT promises across both datacenter and consumer RDNA GPUs? - How long will it take for ROCm to reach feature parity and stability on the new RDNA-based CDNA5 architecture? - Is the Anthropic deal's equity-for-hardware structure a sign of healthy ecosystem growth or dot-com-style circular financing? **Highlights** > but you have to rewrite all your software to ROCm. And ROCm, to this day, still sucks. ZLUDA basically crash on high memory demand, and only accounted for ~70% of CUDA API coverage (and it is still buggy). But hey, at least it does run on Rust-CUDA. I'm one of the few who ported it and fixed a few bugs on ZLUDA. I used it to run a simple SHA256 kernel and it ran sure, but I gave it up because of those fundamental problems on AMD GPUs. You can't believe how messy ROCm is. I wonder if Vulkan compute kernel using SPIR-V would be a better choice. > — [stevefan1999 on hackernews · 2 comments](https://news.ycombinator.com/item?id=49034674) > At least going forward, with both AMD's AI accelerators and Consumer GPUs using the same RDNA based IP, there will be less reason for AMD to drop RDNA GPUs from the ROCm/HIP support matrix! And so with both MI series accelerators and consumer GPUs/Graphics all using the same basic RDNA Micro-Architecture the ROCm/HIP code base developed for "CDNA5"/later will work for consumer RDNA as well with minor changes required! Polaris and Vega GPUs/Graphics both have been dropped from the ROCm/HIP support matrix. But with AMD's "The Rock" software stack making use of SPIR-V in the same manner as Nvidia/PTX there made be little issues getting that to work with older Vega/Polaris GPUs. even if AMD's not validated/verified that software stack with Consumer Vega/Earlier Consumer GPUs and Integrated Graphics. AMD's biggest issue has been dropping its older GPU micro-architectures from the ROCm/HIP support matrix too soon, and just look at Blender 3D's HIP Back End that requires RDNA2/Later GPUs and Graphics for any Radeon iGPU/dGPU Accelerated Blender 3D Cycles rendering support! > — [Farfignoggen on hackernews](https://news.ycombinator.com/item?id=49034833) > Hey, they are only projected to cost about $5.5million a rack. Pocket change, really > — [swiftcoder on hackernews](https://news.ycombinator.com/item?id=49034406) > It's mind blowing seeing these multi exaflop single rack systems. The world's first exaflop supercomputer was Frontier. It was launched only 4 years ago in 2022. It's not a fair comparison of course. FP4 in Helios barely qualifies as floating point. Frontier was proper fp64, 16 times the bit width and probably 256x as many transistors. All the same just wow. Much compute. > — [fancyfredbot on hackernews · 1 comments](https://news.ycombinator.com/item?id=49034224) > Co-founder and Chief Compute Officer Anthropic: > I think the thing that we were thinking about originally was whenever we're bringing up a new hardware platform, it's a big effort. It's like a huge thing. And so as we were thinking about this, we started doing our own evaluation of MI 355. You guys generously got us a rack to start working. And we expected this to be kind of a big process. > Our actual experience was we had one engineer who start doing it. They spun up Claude, asked it, hey, bring up this machine, left it going over the weekend. And we ended up with a graph of the actual performance of our leading model on it, just going up and up and up over the weekend. https://x.com/austinsemis/status/2080336781782753635 > — [dist-epoch on hackernews · 2 comments](https://news.ycombinator.com/item?id=49034718) **Source threads** - [hackernews](https://news.ycombinator.com/item?id=49032072) · 61 points · 54 comments - [hackernews](https://news.ycombinator.com/item?id=49025398) · 21 points · 6 comments ## Similar posts on daily.dev - [AMD’s Helios puts 72 GPUs and 31 terabytes of HBM4 in one rack. It is AMD’s answer to Nvidia’s NVL72.](https://daily.dev/posts/amd-s-helios-puts-72-gpus-and-31-terabytes-of-hbm4-in-one-rack-it-is-amd-s-answer-to-nvidia-s-nvl72-rt5ma3xnm) · The Next Web · 1 upvotes · 0 comments - [AMD Instinct MI350P: PCIe Add-In Card For High Performance Open-Source AI/Compute Review](https://daily.dev/posts/amd-instinct-mi350p-pcie-add-in-card-for-high-performance-open-source-ai-compute-review-xfswkkdb0) · Phoronix · 0 upvotes · 0 comments - [AMD taking AI fight to Nvidia with Helios rack-scale system](https://daily.dev/posts/amd-taking-ai-fight-to-nvidia-with-helios-rack-scale-system-5npotliep) · The Register · 0 upvotes · 0 comments --- [View this post on daily.dev](https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"AMD’s Instinct MI455X: Aiming for the Sun","url":"https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl"},"datePublished":"2026-07-24T12:57:46.413Z","dateModified":"2026-07-25T06:38:49.795Z","description":"AMD has unveiled the Instinct MI455X, its first GPU designed for rack-scale AI deployments, based on the new CDNA5 architecture. Key changes include a shift...","image":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/928a1844690121c6dc4d293cb3b187d3?_a=AQAEuop","thumbnailUrl":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/928a1844690121c6dc4d293cb3b187d3?_a=AQAEuop","isAccessibleForFree":true,"articleSection":"Hacker News","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"Hacker News","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/hn","url":"https://daily.dev/sources/hn"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/amd-s-instinct-mi455x-aiming-for-the-sun-wmt7vvmgl","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":0},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"","timeRequired":"PT7M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"Hacker News","item":"https://daily.dev/sources/hn"},{"@type":"ListItem","position":3,"name":"AMD’s Instinct MI455X: Aiming for the Sun"}]} ```