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# Behind the Scenes of Distributed Training and Why Your GPU Wiring Matters as Much as Your Strategy

**[Towards Data Science](https://daily.dev/sources/tds)** · 27 min read · 1 upvotes · 0 comments

## Summary

A deep dive into distributed training strategies for large models, covering DDP, FSDP, and the ZeRO stages (1, 2, 3) from DeepSpeed as a spectrum between full replication and full sharding. The author explains what each GPU stores under each strategy, the communication primitives involved (all-reduce, all-gather, reduce-scatter), and measured memory/throughput tradeoffs on four A100 GPUs. The second half examines GPU interconnect hardware — PCIe, NVLink bridges (NVL), and NVSwitch — showing that the same FSDP code can run 3–5x slower when a job spans NVL bridge groups versus staying within one group or using NVSwitch. Practical guidance is given on choosing a strategy based on model size and fabric topology, including using `nvidia-smi topo -m` to inspect wiring before launching jobs.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://towardsdatascience.com/behind-the-scenes-of-distributed-training-why-your-gpu-wiring-matters-as-much-as-your-strategy>

## Questions this post answers

### Should I use DDP or FSDP when fine-tuning Mistral-7B on A100 GPUs?

Use FSDP if the model does not fit on a single GPU. Fine-tuning Mistral-7B with Adam in BF16 requires roughly 87GB per GPU for parameters, gradients, and optimizer states, which exceeds an A100's 80GB VRAM and causes DDP to crash with an out-of-memory error, while FSDP shards the state across 4 GPUs down to about 22-29GB per GPU, allowing it to run.

_Anyone weighing memory limits against training speed can track distributed training tradeoffs like these on daily.dev._

### How much does GPU interconnect topology affect all-reduce bandwidth in multi-GPU training?

Interconnect topology causes roughly a 10x bandwidth difference between NVLink and PCIe on the same H200 GPUs, and up to a 9x difference within the same node depending on GPU placement. An NVSwitch fabric stays flat at 330-467 GB/s regardless of GPU count, a full four-GPU NVL bridge group reaches about 322 GB/s, but a job split across two NVL bridge groups falls to only 28-39 GB/s because it must cross PCIe.

_Teams debugging inconsistent multi-GPU throughput can check topology-driven bottlenecks like these on daily.dev._

### Why does FSDP training slow down more than DDP when GPUs are connected over a slow interconnect?

FSDP communicates at every layer via all-gather and reduce-scatter operations, while DDP only performs one all-reduce per training step, so FSDP's per-layer transfers cannot hide behind compute on a slow wire. In measured Mistral-7B fine-tuning, throughput dropped 3 to 5x when a job spanned two NVL bridge groups instead of staying within one, with FSDP falling the hardest of the strategies tested.

_Engineers choosing a sharding strategy under hardware constraints can weigh tradeoffs like these on daily.dev._

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---

Tags: [#machine-learning](https://daily.dev/tags/machine-learning), [#llm](https://daily.dev/tags/llm), [#gpu](https://daily.dev/tags/gpu), [#pytorch](https://daily.dev/tags/pytorch)

[View this post on daily.dev](https://daily.dev/posts/behind-the-scenes-of-distributed-training-and-why-your-gpu-wiring-matters-as-much-as-your-strategy-hxdhri7gq)

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