--- title: ECC and DDR5 | daily.dev description: A technical deep-dive into ECC RAM covering Hamming codes, RDIMM vs UDIMM differences, ChipKill/Advanced ECC, and DDR5-specific changes. DDR5 introduces on-die... canonical: https://daily.dev/posts/ecc-and-ddr5-a7shyqh04 twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: ECC and DDR5 | daily.dev og:description: A technical deep-dive into ECC RAM covering Hamming codes, RDIMM vs UDIMM differences, ChipKill/Advanced ECC, and DDR5-specific changes. DDR5 introduces on-die... og:url: https://daily.dev/posts/ecc-and-ddr5-a7shyqh04 og:image: https://api.daily.dev/og/posts/A7shyQH04.png og:image:alt: ECC and DDR5 og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # ECC and DDR5 **[Hacker News](https://daily.dev/sources/hn)** · 8 min read · 0 upvotes · 0 comments ## Summary A technical deep-dive into ECC RAM covering Hamming codes, RDIMM vs UDIMM differences, ChipKill/Advanced ECC, and DDR5-specific changes. DDR5 introduces on-die ECC (8 bits per 128 bits of data) as a mitigation for increased error rates from smaller/faster memory, but this doesn't replace traditional ECC. DDR5 ECC variants EC4 (36-bit subchannels) and EC8 (40-bit subchannels) are explained, with EC8 enabling full Hamming code checks per subchannel. The author argues EC4 DIMMs are substandard and shouldn't exist. Real-world examples illustrate the cost of RAM errors — filesystem corruption, wasted developer time, and Firefox crashes. The post advocates for wider ECC adoption, potentially through government regulation or taxation of non-ECC RAM. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Similar posts on daily.dev - [DDR5 secretly splits every stick into two memory channels, but you still want a second one](https://daily.dev/posts/ddr5-secretly-splits-every-stick-into-two-memory-channels-but-you-still-want-a-second-one-vwgmc5kjc) · XDA Developers · 2 upvotes · 0 comments - [Your PC's memory controller doesn't care about matching kits — here's what actually matters when mixing RAM](https://daily.dev/posts/your-pc-s-memory-controller-doesn-t-care-about-matching-kits-here-s-what-actually-matters-when-mix-cuyvv8fdv) · XDA Developers · 0 upvotes · 0 comments - [AMD EPYC 9005 Series Memory Scaling Performance From 4 To 24 DDR5 RDIMMs Review](https://daily.dev/posts/amd-epyc-9005-series-memory-scaling-performance-from-4-to-24-ddr5-rdimms-review-xtsgiwhvt) · Phoronix · 0 upvotes · 0 comments --- [View this post on daily.dev](https://daily.dev/posts/ecc-and-ddr5-a7shyqh04) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"ECC and DDR5","url":"https://daily.dev/posts/ecc-and-ddr5-a7shyqh04","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/ecc-and-ddr5-a7shyqh04"},"datePublished":"2026-07-20T14:16:01.620Z","dateModified":"2026-07-20T14:16:29.133Z","description":"A technical deep-dive into ECC RAM covering Hamming codes, RDIMM vs UDIMM differences, ChipKill/Advanced ECC, and DDR5-specific changes. DDR5 introduces on-die...","image":"https://media.daily.dev/image/upload/s--VDukGCjf--/f_auto/v1722860399/public/Placeholder%2002","thumbnailUrl":"https://media.daily.dev/image/upload/s--VDukGCjf--/f_auto/v1722860399/public/Placeholder%2002","isAccessibleForFree":true,"articleSection":"Hacker News","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"Hacker News","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/hn","url":"https://daily.dev/sources/hn"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/ecc-and-ddr5-a7shyqh04","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":0},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"","timeRequired":"PT8M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"Hacker News","item":"https://daily.dev/sources/hn"},{"@type":"ListItem","position":3,"name":"ECC and DDR5"}]} ```