--- title: GCC 17 Compiler Adding "-m128bit-atomic" For 128-bit... description: GCC has merged a new -m128bit-atomic compiler option that generates inline 128-bit atomic load and store instructions for compatible Intel, AMD, Zhaoxin, and... canonical: https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: GCC 17 Compiler Adding "-m128bit-atomic" For 128-bit Atomic Memory Operations | daily.dev og:description: GCC has merged a new -m128bit-atomic compiler option that generates inline 128-bit atomic load and store instructions for compatible Intel, AMD, Zhaoxin, and... og:url: https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z og:image: https://api.daily.dev/og/posts/RkuKU3P4z.png og:image:alt: GCC 17 Compiler Adding "-m128bit-atomic" For 128-bit Atomic Memory Operations og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # GCC 17 Compiler Adding "-m128bit-atomic" For 128-bit Atomic Memory Operations **[Phoronix](https://daily.dev/sources/phoronix)** · 2 min read · 1 upvotes · 0 comments ## Summary GCC has merged a new -m128bit-atomic compiler option that generates inline 128-bit atomic load and store instructions for compatible Intel, AMD, Zhaoxin, and Hygon x86-64 processors, avoiding the overhead of calling into libatomic. The option is enabled by default via -march=native or similar for x86-64-v3 and AVX capable CPUs, following silicon vendor guarantees about 128-bit atomic support. This feature targets the GCC 17.1 stable release expected next spring. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### What does the -m128bit-atomic option do in GCC? It enables GCC to generate inline 128-bit atomic load and store instructions on capable Intel, AMD, Zhaoxin, and Hygon processors, avoiding the overhead of calling into the libatomic library. It is being added to GCC and is enabled by default under -march=native or similar when the target processor supports it, specifically x86-64-v3 capable or AVX-capable CPUs from these vendors. _Developers relying on lock-free 128-bit atomics can follow compiler flag changes like this via daily.dev._ ### Which processors support 128-bit atomic loads and stores confirmed by GCC's -m128bit-atomic option? Intel, AMD, Hygon, and Zhaoxin processors that are x86-64-v3 capable or AVX capable have vendor-confirmed guarantees around 128-bit atomic loads and stores, according to the GCC bugzilla thread tracking this feature. This silicon vendor confirmation is what allowed GCC to add the new compiler option safely. _Teams targeting specific x86-64 CPU baselines can track vendor guarantees like these through daily.dev._ ### When will GCC's -m128bit-atomic option be available in a stable release? It is expected in GCC 17.1, the stable release due in spring following this merge into GCC Git. The feature itself was merged to GCC's development code via a dedicated commit implementing the x86-64 -m128bit-atomic option. _Anyone planning a GCC upgrade can watch for feature landings like this ahead of release day via daily.dev._ ## Similar posts on daily.dev - [GCC 17 Compiler Merges Initial Support For Intel/AMD AI Compute Extensions "ACE"](https://daily.dev/posts/gcc-17-compiler-merges-initial-support-for-intel-amd-ai-compute-extensions-ace--zwwfphik0) · Phoronix · 0 upvotes · 0 comments - [GCC 17 Now Supports Using -mtune=native -mcpu=native On RISC-V](https://daily.dev/posts/gcc-17-now-supports-using--mtune-native--mcpu-native-on-risc-v-djbpasrzx) · Phoronix · 0 upvotes · 0 comments - [Someone changed one line in the GCC compiler and scored a 12% improvement on modern Intel and AMD chips](https://daily.dev/posts/someone-changed-one-line-in-the-gcc-compiler-and-scored-a-12-improvement-on-modern-intel-and-amd-ch-d1otkz2tx) · XDA Developers · 0 upvotes · 0 comments - [GCC 16 Release Series — Changes, New Features, and Fixes](https://daily.dev/posts/gcc-16-release-series-changes-new-features-and-fixes-fldvgf5iu) · Hacker News · 0 upvotes · 0 comments --- Tags: [#c++](https://daily.dev/tags/c++) [View this post on daily.dev](https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"GCC 17 Compiler Adding \"-m128bit-atomic\" For 128-bit Atomic Memory Operations","url":"https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z"},"datePublished":"2026-08-12T18:46:03.648Z","dateModified":"2026-09-14T06:55:07.440Z","description":"GCC has merged a new -m128bit-atomic compiler option that generates inline 128-bit atomic load and store instructions for compatible Intel, AMD, Zhaoxin, and...","image":"https://www.phoronix.com/assets/categories/gnu.webp","thumbnailUrl":"https://www.phoronix.com/assets/categories/gnu.webp","isAccessibleForFree":true,"articleSection":"Phoronix","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"Phoronix","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/6a26ba379dd64932830aa0c9803dd7ee","url":"https://daily.dev/sources/phoronix"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":1},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"c++","timeRequired":"PT2M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"Phoronix","item":"https://daily.dev/sources/phoronix"},{"@type":"ListItem","position":3,"name":"GCC 17 Compiler Adding \"-m128bit-atomic\" For 128-bit Atomic Memory Operations"}]} {"@context":"https://schema.org","@type":"FAQPage","@id":"https://daily.dev/posts/gcc-17-compiler-adding--m128bit-atomic-for-128-bit-atomic-memory-operations-rkuku3p4z#faq","mainEntity":[{"@type":"Question","name":"What does the -m128bit-atomic option do in GCC?","acceptedAnswer":{"@type":"Answer","text":"It enables GCC to generate inline 128-bit atomic load and store instructions on capable Intel, AMD, Zhaoxin, and Hygon processors, avoiding the overhead of calling into the libatomic library. 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