--- title: Helion on TPU: Towards Hardware Heterogeneous Kernel... description: Helion is PyTorch's high-level DSL for writing performance-portable ML kernels. A new TPU backend compiles Helion kernels to Pallas (Google's low-level TPU... canonical: https://daily.dev/posts/helion-on-tpu-towards-hardware-heterogeneous-kernel-authoring-pytorch-uvlidlhmw twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: Helion on TPU: Towards Hardware Heterogeneous Kernel Authoring – PyTorch | daily.dev og:description: Helion is PyTorch's high-level DSL for writing performance-portable ML kernels. A new TPU backend compiles Helion kernels to Pallas (Google's low-level TPU... og:url: https://daily.dev/posts/helion-on-tpu-towards-hardware-heterogeneous-kernel-authoring-pytorch-uvlidlhmw og:image: https://api.daily.dev/og/posts/uvLidLhMW.png og:image:alt: Helion on TPU: Towards Hardware Heterogeneous Kernel Authoring – PyTorch og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Helion on TPU: Towards Hardware Heterogeneous Kernel Authoring – PyTorch **[PyTorch](https://daily.dev/sources/pytorch)** · 9 min read · 1 upvotes · 0 comments ## Summary Helion is PyTorch's high-level DSL for writing performance-portable ML kernels. A new TPU backend compiles Helion kernels to Pallas (Google's low-level TPU DSL), enabling PyTorch-style kernel authoring for TPUs without deep Pallas expertise. On a flash attention workload, the Helion-generated kernel achieves 838 TFLOPs (~79% MFU) on TPU v7. The key innovation is an autotuner that selects between two pipelining strategies — `emit_pipeline` (memory-efficient, scales to long sequences) and `unroll` (pre-fetches K/V into VMEM, eliminates compute bubbles but uses more memory) — based on input shape. Across a broader benchmark suite, Helion achieves a geometric mean 1.55x speedup over TorchTPU eager and 1.12x over torch.compile with XLA, with the largest gains on fusion-heavy kernels like attention that XLA struggles to optimize automatically. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### What TFLOPs does Helion achieve for flash attention on TPU v7? Helion-generated flash attention kernels achieve 838 TFLOPs on TPU v7 (Ironwood), representing roughly 79% MFU of one tensor core. This is achieved by compiling PyTorch-style Helion code down to Pallas, Google's low-level TPU kernel DSL, while autotuning pipelining strategies to maximize VMEM usage and overlap memory transfers with compute. _Track how new TPU kernel toolchains stack up on real workloads by following Helion coverage on daily.dev._ ### What is the performance difference between emit_pipeline and unroll strategies in Helion's Pallas codegen for flash attention? For flash attention with B=8, H=32, D=256 at sequence length 8k, the unroll strategy achieves 892 TFLOPs versus 653 TFLOPs for emit_pipeline, because unroll pre-fetches K and V fully into VMEM and avoids reloading them per query tile. However, at sequence length 32k, unroll runs out of memory (OOM), so Helion's autotuner falls back to emit_pipeline, which achieves 695 TFLOPs and scales to longer sequences. _Compare kernel pipelining trade-offs like this when evaluating TPU tooling choices on daily.dev._ ### How much faster is Helion than torch.compile with XLA on TPU across common ML kernels? Helion shows a geometric average speedup of 1.12x compared to torch.compile using XLA, and 1.55x compared to TorchTPU eager mode, across a benchmark suite of kernels including attention, softmax, matmul, and layer norm. The largest gains appear on fused or complex kernels like attention (4.48x over torch.compile), while standard ops like matmul and layer_norm show comparable or slightly lower performance since XLA already optimizes them well. _Keep tabs on kernel-level benchmarks like these to inform PyTorch and TPU tooling decisions via daily.dev._ ## Similar posts on daily.dev - [Helion: A High-Level DSL for Performant and Portable ML Kernels – PyTorch](https://daily.dev/posts/helion-a-high-level-dsl-for-performant-and-portable-ml-kernels-pytorch-przi31los) · PyTorch · 0 upvotes · 0 comments - [From 200 lines to 15: How Helion is rewriting the rules of GPU programming](https://daily.dev/posts/from-200-lines-to-15-how-helion-is-rewriting-the-rules-of-gpu-programming-ewda7l8wq) · Red Hat Developer · 0 upvotes · 0 comments - [Portable Paged Attention in Helion – PyTorch](https://daily.dev/posts/portable-paged-attention-in-helion-pytorch-p3relozri) · PyTorch · 0 upvotes · 0 comments - [Portable vLLM Model Inference Kernels in Helion – PyTorch](https://daily.dev/posts/portable-vllm-model-inference-kernels-in-helion-pytorch-ay8n7jjmi) · PyTorch · 0 upvotes · 0 comments - [TorchTPU: Running PyTorch Natively on TPUs at Google Scale](https://daily.dev/posts/torchtpu-running-pytorch-natively-on-tpus-at-google-scale-vntmbrdik) · Hacker News · 2 upvotes · 0 comments --- Tags: [#pytorch](https://daily.dev/tags/pytorch) [View this post on daily.dev](https://daily.dev/posts/helion-on-tpu-towards-hardware-heterogeneous-kernel-authoring-pytorch-uvlidlhmw) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"Helion on TPU: Towards Hardware Heterogeneous Kernel Authoring – PyTorch","url":"https://daily.dev/posts/helion-on-tpu-towards-hardware-heterogeneous-kernel-authoring-pytorch-uvlidlhmw","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/helion-on-tpu-towards-hardware-heterogeneous-kernel-authoring-pytorch-uvlidlhmw"},"datePublished":"2026-07-23T17:23:23.401Z","dateModified":"2026-09-14T06:26:28.158Z","description":"Helion is PyTorch's high-level DSL for writing performance-portable ML kernels. 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