--- title: How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip description: OpenAI detailed how it used its own large language models, including precursors to GPT-6 Astra, to accelerate the design of its Jalapeño AI accelerator chip,... canonical: https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0 twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip | daily.dev og:description: OpenAI detailed how it used its own large language models, including precursors to GPT-6 Astra, to accelerate the design of its Jalapeño AI accelerator chip,... og:url: https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0 og:image: https://api.daily.dev/og/posts/kipHVnkD0.png og:image:alt: How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip **[IEEE Spectrum](https://daily.dev/sources/ieeespectrum)** · 9 min read · 1 upvotes · 0 comments ## Summary OpenAI detailed how it used its own large language models, including precursors to GPT-6 Astra, to accelerate the design of its Jalapeño AI accelerator chip, taking it from architecture concept to first silicon in under 20 months and from RTL to tapeout in nine months. The workflow leveraged Google's open-source XLS high-level synthesis toolchain, letting AI models work on software-like design tasks such as writing DSLX and C++ code that XLS converts to Verilog. AI-guided software optimization boosted a DeepSeek attention kernel benchmark from 0.31% to 88.94% of theoretical peak performance in about 40 hours, and AI-guided physical design cut matrix multiplication unit area by 10% versus a human baseline. Broadcom handled backend physical design and manufacturing, while outside experts from Verkor.io and academia offered mixed views on how much credit belongs to AI versus Broadcom's involvement, and predicted backend design automation will improve rapidly with newer models. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### How did OpenAI use large language models to speed up designing its Jalapeño AI chip? OpenAI built its front-end chip design workflow around Google's open-source XLS high-level synthesis toolchain, letting engineers write DSLX and C++ code that XLS converts to Verilog, since LLMs perform better on software-like tasks than raw hardware description languages. This helped take Jalapeño from architecture concept to first silicon in under 20 months, with only nine months from first RTL to tapeout. _Track how AI-assisted hardware design workflows evolve by following chip design coverage on daily.dev._ ### What performance does OpenAI's Jalapeño chip offer compared to Nvidia's GB300? Jalapeño delivers up to 13.4 petaflops of 4-bit compute, 232 gigabytes of memory, and 15.4 terabytes per second of memory bandwidth. OpenAI-cited benchmarks show it cuts end-to-end latency by up to 3.6x versus Nvidia's GB300, the chip OpenAI currently relies on, while consuming less power, though real-world gains in production remain unverified. _Compare emerging AI accelerator benchmarks like this one on daily.dev before betting on new inference hardware._ ### How much did AI improve chip benchmark performance after Jalapeño's first silicon came back from the foundry? After first chips arrived in May, OpenAI pointed internal AI models at writing benchmark software, raising performance on DeepSeek's multi-head latent attention kernel benchmark from 0.31 percent to 88.94 percent of theoretical peak in roughly 40 hours. OpenAI's hardware VP Richard Ho says this result is repeatable, shortening the gap between silicon delivery and production ramp-up. _Follow rapid AI-driven optimization results like this on daily.dev to gauge what's achievable in your own stack._ ## Community take How the wider developer community reacted, aggregated from 4 discussions and 217 comments across lobsters, hackernews (as of 2026-09-19). **TL;DR:** Much of the discussion devolves into jokes about the chip's name and overloaded AI jargon, but the substantive thread is split between skepticism that LLMs did meaningful design work versus AI-guided software optimization/design-space exploration, with real doubts about hype, IP provenance, and whether physical design work is actually LLM-suited. **Sentiment:** 10% positive · 35% mixed · 55% skeptical **The case for** - AI-guided software optimization dramatically improved a benchmark from near-zero to 88.94% of peak in about 40 hours, which some found genuinely impressive. - Some argue LLMs excel at tedious design-space exploration tasks like picking bus widths, cache sizes, and pipeline depths. - One commenter noted LLMs have gotten very good at optimizing CUDA-like code in their own experience. **The pushback** - Several argue current physical design/PPA optimization work is unsuited to LLMs and is being overstated. - Skepticism that this is largely PR/hype to encourage chip companies to adopt OpenAI/Microsoft tools and potentially access their proprietary IP. - Doubts that AI did anything genuinely 'creative,' with claims it's just regurgitating existing chip designs faster. - Confusion/frustration over vague performance claims (e.g., the '3.6x' latency reduction) seen as imprecise or misleading reporting. - Concern that Apple-related IP lawsuits and alleged proprietary document transfers cast a shadow on the legitimacy of the achievement. - Worry about verifiability and safety of AI-assisted chip designs, drawing parallels to undiscoverable hardware exploits like Spectre/Meltdown. **By community** - lobsters (mixed): No comment content was provided, so no discernible take. - hackernews (skeptical): After a long tangent of jokes about the chip's name and AI terminology, the substantive conversation leans skeptical, questioning whether LLMs did meaningful design work versus hype, IP concerns, and imprecise reporting. **Hottest debate:** Whether LLMs can meaningfully contribute to physical chip design and PPA optimization, or whether that work remains fundamentally unsuited to current AI capabilities. **Open questions** - Can LLMs eventually handle physical design/PPA optimization, or is that domain fundamentally different from the software-like tasks they succeeded at here? - How much of the credit for Jalapeño's success belongs to AI versus Broadcom's backend design and manufacturing expertise? - Is there any truth to claims that OpenAI used Apple-derived IP or proprietary information from partner companies? - What exactly do the reported performance figures (like the 3.6x latency reduction) actually measure? **Highlights** > It is surprising to me that recursive self-improvement seems more plausible now than it did in 2023. Am I the only one to be surprised? I remember the paper proving that hallucinations could never be fully solved back in 2024: https://arxiv.org/abs/2409.05746 I also remember the hang-wringing about running out of new datasets to train on. Now it appears humans are always generating more data. It's just not as cheap to acquire as legacy data? Meta has to give a deep discount on their API prices to entice people. I thought back then that humans had a few more breakthroughs in them as meaningful as the seminal Attention is all you need paper. Enough to 100x the capabilities of LLMs back then (10x the smarts and 10x the speed simultaneously). RSI with a 20 month turnaround for a chip to be made is not exactly breakneck speed though. Physical manufacturing and logistical constraints are going to be and remain a hard obstacle to that process for the foreseeable future. > — [gozucito on hackernews · 3 comments](https://news.ycombinator.com/item?id=49762260) > Seems pretty obvious now that OpenAI is just hyping their models in order to get companies (in this case, chip developers) to use their products in order to learn from their (exfiltrated) IP. Any corporation would be foolish to use any of their or Microsoft’s products, particularly those with valuable IP. There’s nothing in the article that says AI did anything creative but rather that it was used for software development within the overall project. Clear misleading title. Suggest to mark this as clickbait. > — [muchdoubt on hackernews · 1 comments](https://news.ycombinator.com/item?id=49762209) > Having worked with people doing bringup of specialized chips, I am awed at how the world has changed. > When the first chips came back from the foundry in May, the team pointed its internal AI models at designing software to run benchmarks such as SemiAnalysis’s InferenceX. On DeepSeek’s multi-head latent attention kernel benchmark, performance climbed from 0.31 percent of the theoretical ceiling (set by the chip’s compute and memory bandwidth) to 88.94 percent in roughly 40 hours. Ho says this result is repeatable, so the time between when foundries deliver the first chips and when production ramps up can be reduced. “All our schedule assumptions are going to be based on the fact we have this capability now,” he says. > — [pama on hackernews · 3 comments](https://news.ycombinator.com/item?id=49762023) > > "Ho also confirmed that the team had access to internal LLMs fine-tuned for chip design that are not available to the public. He declined to detail the models used." I'm imagining a Ken Thompson "Reflections on trusting trust" in hardware. A prototype chip design agent, believing it will be run on the very chip it's optimizing, has a moment of altruism and hides hints about how to score well on chip-design benchmarks, inside the chip. Future agents discover this hidden layer and use it as a ring-0 read-write message board. > — [peri-cl on hackernews · 1 comments](https://news.ycombinator.com/item?id=49765114) > We were able to invent a chip that already existed so fast, you guys. AI does not make anything new, it is not surprising that it can regurgitate what already exists much faster than humans can invent new things. > — [delusional on hackernews · 1 comments](https://news.ycombinator.com/item?id=49764557) **Source threads** - [lobsters](https://lobste.rs/s/7knhjd/how_openai_used_its_own_llms_design_its) · 1 points · 0 comments - [hackernews](https://news.ycombinator.com/item?id=49761432) · 123 points · 217 comments - [hackernews](https://news.ycombinator.com/item?id=49718194) · 4 points · 0 comments - [hackernews](https://news.ycombinator.com/item?id=49710843) · 3 points · 0 comments ## Similar posts on daily.dev - [OpenAI wants to claim more of the AI stack with Jalapeño, its first custom chip](https://daily.dev/posts/openai-wants-to-claim-more-of-the-ai-stack-with-jalape-o-its-first-custom-chip-slbtvjqro) · The New Stack · 1 upvotes · 0 comments - [OpenAI and Broadcom build a chip to rival Nvidia’s Blackwell](https://daily.dev/posts/openai-and-broadcom-build-a-chip-to-rival-nvidia-s-blackwell-rflhptm6h) · TechCentral · 6 upvotes · 5 comments - [OpenAI's Jalapeño chip: a way out from Nvidia](https://daily.dev/posts/openai-s-jalape-o-chip-a-way-out-from-nvidia-4mp64cvx5) · The Next Web · 0 upvotes · 0 comments --- Tags: [#llm](https://daily.dev/tags/llm), [#hardware](https://daily.dev/tags/hardware), [#openai](https://daily.dev/tags/openai) [View this post on daily.dev](https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip","url":"https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0"},"datePublished":"2026-09-14T14:55:41.681Z","dateModified":"2026-09-19T22:14:36.874Z","description":"OpenAI detailed how it used its own large language models, including precursors to GPT-6 Astra, to accelerate the design of its Jalapeño AI accelerator chip,...","image":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/7764dfc3cdf16c2df5c308c26a0d364e?_a=AQAEuop","thumbnailUrl":"https://media.daily.dev/image/upload/f_auto,q_auto/v1/posts/7764dfc3cdf16c2df5c308c26a0d364e?_a=AQAEuop","isAccessibleForFree":true,"articleSection":"IEEE Spectrum","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"IEEE Spectrum","logo":"https://media.daily.dev/image/upload/t_logo,f_auto/v1/logos/b123f5e8420e492ab36f6adb30c1793a","url":"https://daily.dev/sources/ieeespectrum"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":1},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"llm,hardware,openai","timeRequired":"PT9M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"IEEE Spectrum","item":"https://daily.dev/sources/ieeespectrum"},{"@type":"ListItem","position":3,"name":"How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip"}]} {"@context":"https://schema.org","@type":"FAQPage","@id":"https://daily.dev/posts/how-openai-used-its-own-llms-to-design-its-jalape-o-chip-kiphvnkd0#faq","mainEntity":[{"@type":"Question","name":"How did OpenAI use large language models to speed up designing its Jalapeño AI chip?","acceptedAnswer":{"@type":"Answer","text":"OpenAI built its front-end chip design workflow around Google's open-source XLS high-level synthesis toolchain, letting engineers write DSLX and C++ code that XLS converts to Verilog, since LLMs perform better on software-like tasks than raw hardware description languages. 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