IBM has announced the world's first sub-1nm chip technology at the 0.7nm (7-angstrom) node, built on a new 3D architecture called 'nanostack.' Rather than shrinking transistors on a flat plane, nanostack stacks them vertically using 3D sequential integration, enabling nearly 100 billion transistors on a fingernail-sized chip — roughly twice the density of IBM's 2021 2nm chip. IBM claims up to 50% more performance or 70% better energy efficiency versus that generation, along with 40% SRAM scaling. The architecture was validated with a working CMOS inverter at VLSI 2026. Key caveats: IBM sold its manufacturing business in 2014, so this is a research milestone rather than a shipping product, with production estimated at least five years away.
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