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# IonQ Researchers Run MegaQuOp-Scale Quantum Error Decoder on a MacBook Pro

**[The Quantum Insider](https://daily.dev/sources/thequantuminsider)** · 9 min read · 0 upvotes · 0 comments

## Summary

IonQ researchers demonstrated an end-to-end quantum error decoder capable of handling MegaQuOp-scale simulated workloads—up to 408 logical qubits and over 1 million quantum operations—running entirely on a single Apple M4 Max MacBook Pro CPU, using 12 of its 16 cores. The decoder added less than 0.3% overhead at a two-qubit gate error rate of 0.01%, and under 12% at a 0.05% error rate. The test modeled IonQ's proposed 'walking cat' trapped-ion architecture using quantum LDPC codes, simulating error streams rather than running on real MegaQuOp hardware, which does not yet exist. Techniques included incremental error-model updates and reduced memory footprint to allow concurrent decoding processes. The researchers note the results are architecture-specific and based on circuit-level noise simulation rather than real hardware data, with rare decoder convergence failures possible.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://thequantuminsider.com/2026/08/31/ionq-researchers-run-megaquop-scale-quantum-error-decoder-on-a-macbook-pro>

## Questions this post answers

### Can a MacBook Pro handle quantum error decoding for a large-scale fault-tolerant quantum computer?

Yes, in simulation. IonQ researchers ran an end-to-end decoder for a simulated MegaQuOp-scale workload—up to 408 logical qubits and over 1 million quantum operations—on a single Apple M4 Max processor, using 12 of its 16 CPU cores. Decoding added under 0.3% overhead at a 0.01% two-qubit gate error rate and under 12% at a 0.05% error rate.

_Following how classical hardware keeps pace with quantum error correction gets easier with daily.dev's research tracking._

### What is IonQ's walking cat architecture for trapped-ion quantum computing?

It is a proposed fault-tolerant trapped-ion design that stores logical qubits in quantum low-density parity-check (LDPC) codes, using separate magic-state factories to supply resources for T gates. It tracks many logical operations in software without physically merging or reshaping error-correcting blocks, and was the architecture modeled in a decoder benchmark using 68 memory blocks, 20 magic-state factories, 11,680 physical qubits, and 408 logical qubits.

_Engineers evaluating fault-tolerant quantum designs can follow architecture developments like this on daily.dev._

### How much time overhead does classical error decoding add to a fault-tolerant quantum computation?

At a two-qubit gate error rate of 0.01%, decoding added as little as 0.02% to 0.24% extra computation time across tested workloads; at a 0.05% error rate, overhead ranged from 0.72% up to 11.53%, depending on the benchmark and assumed syndrome-extraction cycle time (1ms or 5ms). These figures come from simulations of IonQ's walking-cat trapped-ion architecture, not from a running quantum computer.

_Tracking realistic performance benchmarks like this helps quantum developers gauge decoder feasibility on daily.dev._

## Similar posts on daily.dev

- [Demonstrating real-time and low-latency quantum error correction with superconducting qubits](https://daily.dev/posts/demonstrating-real-time-and-low-latency-quantum-error-correction-with-superconducting-qubits-rhwsq5rei) · Nature · 0 upvotes · 0 comments
- [IonQ Achieves 99.99% Two-Qubit Gate Performance](https://daily.dev/posts/ionq-achieves-99-99-two-qubit-gate-performance-0lq49upqp) · The Quantum Insider · 0 upvotes · 0 comments
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