--- title: "IsoExec: Unified Execution to Eliminate Trainer-Inference Mismatch in SkyRL" url: https://daily.dev/posts/isoexec-unified-execution-to-eliminate-trainer-inference-mismatch-in-skyrl-4scdy1ovn source_url: https://vllm.ai/blog/2026-08-21-isoexec type: article source: "vLLM" published: 2026-08-21T13:54:06.350Z updated: 2026-08-21T14:03:44.663Z tags: ["reinforcement-learning", "vllm"] reading_time: 9 upvotes: 0 comments: 0 language: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # IsoExec: Unified Execution to Eliminate Trainer-Inference Mismatch in SkyRL **[vLLM](https://daily.dev/sources/vllm)** · 9 min read · 0 upvotes · 0 comments ## Summary IsoExec is a cross-framework execution abstraction built for SkyRL that eliminates numerical mismatch between rollout (vLLM) and training (Megatron) engines in RL workloads. It combines an execution contract enforcing identical rounding-sensitive kernel choices with a unified, batch-invariant, bitwise-consistent model, plus a new chunkwise-parallel recurrent (CPR) algorithm for Gated DeltaNet architectures. On an 8×H100 node training Qwen3.5-35B-A3B with DAPO, it reduced average rollout-versus-training logprob difference below 1e-6 at a 25.3% end-to-end step-time overhead versus the native SkyRL stack, with no clear reward gain observed over a short 50-step run. The implementation is open-sourced. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### What causes the mismatch between rollout and training logprobs in RL training systems like SkyRL that use vLLM and Megatron? Rollout and training engines use different kernels, batch shapes, execution modes, and parallelism layouts, and since floating-point arithmetic is non-associative, these differences change reduction order and therefore token probabilities even when both engines execute the same policy. This mismatch can destabilize algorithms like REINFORCE and GRPO and complicate debugging of new RL infrastructure changes. _Teams debugging RL training instability can follow infrastructure fixes like this one on daily.dev._ ### How much overhead does eliminating train-inference mismatch add to RL training with IsoExec in SkyRL? IsoExec adds roughly 25.3% end-to-end overhead per RL step compared to the native SkyRL stack when training Qwen3.5-35B-A3B with DAPO on a single 8xH100 node. Generation time increased 31.3% (591.3s to 776.6s) and policy training increased 18.6% (498.6s to 591.3s), while reducing average rollout-versus-training logprob difference below 1e-6. _Engineers weighing numerical precision against throughput in RL pipelines can track these trade-offs on daily.dev._ ### What is chunkwise-parallel recurrent (CPR) and why was it built for Gated DeltaNet models? Chunkwise-parallel recurrent (CPR) is an algorithm that keeps the recurrence as the main computation but evaluates it in parallel across chunks, designed to make Gated DeltaNet training, prefill, and decode bitwise consistent without the 2-5x slowdown of using a fully recurrent form everywhere. It achieves this with only 1.38-1.67x overhead versus native mixed implementations, versus 4.3x or worse for naive alternatives. _Developers optimizing linear-attention architectures for RL can follow kernel-level techniques like this on daily.dev._ ## Similar posts on daily.dev - [Building an RL Theorem-Proving Workflow on Modal](https://daily.dev/posts/building-an-rl-theorem-proving-workflow-on-modal-qareohy4r) · Modal · 0 upvotes · 0 comments - [Systems Engineering Playbook: Optimizing Qwen 3.5-397B MoE on Ironwood \(TPU7x\)](https://daily.dev/posts/systems-engineering-playbook-optimizing-qwen-3-5-397b-moe-on-ironwood-tpu7x--quc6gr0fd) · Google Developers · 1 upvotes · 0 comments --- Tags: [#reinforcement-learning](https://daily.dev/tags/reinforcement-learning), [#vllm](https://daily.dev/tags/vllm) [View this post on daily.dev](https://daily.dev/posts/isoexec-unified-execution-to-eliminate-trainer-inference-mismatch-in-skyrl-4scdy1ovn)