--- title: Making cross-platform SIMD code pleasant | daily.dev description: A third-generation redesign of the SIMD support in the bx library removes strong typing in favor of a single typeless register type, arguing that reinterpret... canonical: https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: Making cross-platform SIMD code pleasant | daily.dev og:description: A third-generation redesign of the SIMD support in the bx library removes strong typing in favor of a single typeless register type, arguing that reinterpret... og:url: https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq og:image: https://api.daily.dev/og/posts/SNo7XkYyQ.png og:image:alt: Making cross-platform SIMD code pleasant og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Making cross-platform SIMD code pleasant **[Overview — bgfx 1.146.9292 documentation](https://daily.dev/sources/bkaradzic)** · 9 min read · 0 upvotes · 0 comments ## Summary A third-generation redesign of the SIMD support in the bx library removes strong typing in favor of a single typeless register type, arguing that reinterpret casts and lane-typed intrinsics only add friction since hardware registers are just bags of bits. The post covers a naming convention encoding register width and lane type in function names, an SSA-style coding convention for readable dataflow, using simd32_t as an incremental on-ramp to SIMDify scalar code, and ABI trade-offs for passing vector types (MSVC vectorcall vs System V vs ARM64 AAPCS64) plus how the small reference-backend structs behave differently across compilers. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### Why would a SIMD library drop strong typing for lane types instead of using typed intrinsics like NEON's float32x4_t? Strong typing gets in the way of real SIMD code, which constantly mixes integer and floating-point operations through compare masks and branchless selects. Hardware registers like XMM, YMM, and NEON registers are just bags of bits interpreted by the instruction executed on them, so a typeless design eliminates reinterpret casts such as _mm_castps_si128 or vreinterpretq_f32_u32 and lets the same register flow through f32_add, u32_cmpgt, and selb. _For code that stays fast and portable, daily.dev surfaces deep dives like this on SIMD architecture._ ### How many vector argument registers does MSVC's __vectorcall give versus the default x64 calling convention? MSVC's __vectorcall provides 6 vector argument registers (XMM0-XMM5 or YMM0-YMM5) compared to only 4 (XMM0-XMM3 or YMM0-YMM3) under the default Microsoft x64 ABI. By contrast, System V already provides 8 vector registers (XMM0-XMM7/YMM0-YMM7) with no special calling convention required, and ARM64 AAPCS64 also provides 8 (V0-V7). _Developers tuning cross-platform ABI performance can track SIMD calling-convention details on daily.dev._ ### How does MSVC handle passing a 128-bit reference-backend struct like simd128_ref_t by value compared to System V? System V passes a simd128_ref_t in two general-purpose registers, but MSVC's default x64 ABI silently converts any struct larger than 8 bytes into a hidden pointer, forcing an implicit stack copy plus an extra indirection. This penalty disappears once the function is inlined, which is typical since these functions are marked inline or force-inline; the ABI cost only matters at non-inlined boundaries like function pointers, virtual dispatch, or DLL edges. _Anyone debugging cross-compiler ABI quirks in performance code can find this kind of detail on daily.dev._ ## Similar posts on daily.dev - [Everyone Should Know SIMD](https://daily.dev/posts/everyone-should-know-simd-jggqusevq) · Mitchell Hashimoto · 3 upvotes · 0 comments - [C\+\+26 Shipped a SIMD Library Nobody Asked For](https://daily.dev/posts/c-26-shipped-a-simd-library-nobody-asked-for-olmtt2aj7) · Hacker News · 7 upvotes · 1 comments - [fearless\_simd v0.7: 64-bit integers, improved generics, SSE2, and upcoming v1.0](https://daily.dev/posts/fearless-simd-v0-7-64-bit-integers-improved-generics-sse2-and-upcoming-v1-0-aors3lfex) · Lobsters · 0 upvotes · 0 comments --- Tags: [#performance](https://daily.dev/tags/performance), [#c++](https://daily.dev/tags/c++) [View this post on daily.dev](https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"Making cross-platform SIMD code pleasant","url":"https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq"},"datePublished":"2026-08-23T12:17:02.547Z","dateModified":"2026-08-23T12:19:32.684Z","description":"A third-generation redesign of the SIMD support in the bx library removes strong typing in favor of a single typeless register type, arguing that reinterpret...","image":"https://media.daily.dev/image/upload/s--HRgLpUt6--/f_auto/v1722860399/public/Placeholder%2003","thumbnailUrl":"https://media.daily.dev/image/upload/s--HRgLpUt6--/f_auto/v1722860399/public/Placeholder%2003","isAccessibleForFree":true,"articleSection":"Overview — bgfx 1.146.9292 documentation","inLanguage":"en","publisher":{"@type":"Organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180}},"author":{"@type":"Organization","name":"Overview — bgfx 1.146.9292 documentation","logo":"https://media.daily.dev/image/upload/logos/placeholder.jpg","url":"https://daily.dev/sources/bkaradzic"},"commentCount":0,"discussionUrl":"https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq","interactionStatistic":[{"@type":"InteractionCounter","interactionType":{"@type":"LikeAction"},"userInteractionCount":0},{"@type":"InteractionCounter","interactionType":{"@type":"CommentAction"},"userInteractionCount":0}],"keywords":"performance,c++","timeRequired":"PT9M"} {"@context":"https://schema.org","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https://daily.dev"},{"@type":"ListItem","position":2,"name":"Overview — bgfx 1.146.9292 documentation","item":"https://daily.dev/sources/bkaradzic"},{"@type":"ListItem","position":3,"name":"Making cross-platform SIMD code pleasant"}]} {"@context":"https://schema.org","@type":"FAQPage","@id":"https://daily.dev/posts/making-cross-platform-simd-code-pleasant-sno7xkyyq#faq","mainEntity":[{"@type":"Question","name":"Why would a SIMD library drop strong typing for lane types instead of using typed intrinsics like NEON's float32x4_t?","acceptedAnswer":{"@type":"Answer","text":"Strong typing gets in the way of real SIMD code, which constantly mixes integer and floating-point operations through compare masks and branchless selects. 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