--- title: Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers... description: qwenGPU compiles a 4-lane SIMT GPU directly into the weights of Qwen3.5-2B, adding 45 untrained layers on top of Qwen's own 24, for 69 total. It runs real... canonical: https://daily.dev/posts/meet-qwengpu-qwen3-5-2b-with-45-compiled-gpu-layers-that-run-cuda-q0haljsm8 twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA | daily.dev og:description: qwenGPU compiles a 4-lane SIMT GPU directly into the weights of Qwen3.5-2B, adding 45 untrained layers on top of Qwen's own 24, for 69 total. It runs real... og:url: https://daily.dev/posts/meet-qwengpu-qwen3-5-2b-with-45-compiled-gpu-layers-that-run-cuda-q0haljsm8 og:image: https://api.daily.dev/og/posts/Q0hALjSm8.png og:image:alt: Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA **[Machine Learning News](https://daily.dev/sources/mlnews)** · 5 min read · 0 upvotes · 0 comments ## Summary qwenGPU compiles a 4-lane SIMT GPU directly into the weights of Qwen3.5-2B, adding 45 untrained layers on top of Qwen's own 24, for 69 total. It runs real CUDA, compiled to NVIDIA PTX, inside its own forward passes using Gated DeltaNet state as registers, ROM and memory. The reference interpreter matched a real NVIDIA Tesla T4 on 49 of 49 test kernels, and text quality stays within a KL of about 7e-4 of the base model. Speed tops out at 10 to 15 tokens per second on Apple MPS, so it is a research demo rather than a runtime. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### What is qwenGPU and how does it run CUDA inside an LLM's weights? qwenGPU compiles a 4-lane SIMT GPU directly into the weights of Qwen3.5-2B as 45 untrained, compiler-computed layers placed in front of Qwen's own 24 layers. It uses Qwen3.5's Gated DeltaNet linear attention as memory cells, holding program ROM, registers and global memory, letting the model execute real CUDA compiled to NVIDIA PTX during its own forward passes. _Developers exploring unconventional LLM architectures can track experiments like this on daily.dev._ ### How accurate is qwenGPU's CUDA execution compared to real GPU hardware? The reference interpreter matched a real NVIDIA Tesla T4 exactly on 49 of 49 test kernels, and every launch was exact under replay checks, according to developer Vixhal's self-reported Apple silicon MPS bf16 measurements. In advanced mode, where Qwen writes its own CUDA kernel, it got a correct kernel on the first try for 4 of 5 questions, though the README notes a 2B model's CUDA remains unreliable. _Teams evaluating experimental AI infrastructure claims can follow benchmark reports like this via daily.dev._ ### How fast is qwenGPU and is it usable for real workloads? qwenGPU runs at about 10 to 15 tokens per second on Apple MPS, which developer Vixhal describes as a research demo rather than a practical runtime. It needs roughly 16 GB of free memory, runs on Apple silicon, NVIDIA GPUs or CPU, has no quantized build, and no prebuilt checkpoint is published, requiring a local build via 'just build'. _Anyone weighing experimental AI projects against production-ready tools can compare notes on daily.dev._ ## Similar posts on daily.dev - [Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5](https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm) · Hacker News · 2 upvotes · 0 comments - [Up to 580tps\! New Speed Record of Qwen3.5-397B-A17B on GPU for Agentic Workloads with TokenSpeed – PyTorch](https://daily.dev/posts/up-to-580tps-new-speed-record-of-qwen3-5-397b-a17b-on-gpu-for-agentic-workloads-with-tokenspeed-p-imoe4kosk) · PyTorch · 0 upvotes · 0 comments - [What is Qwenputer ? A Working RISC-V CPU Inside Qwen3.5](https://daily.dev/posts/what-is-qwenputer-a-working-risc-v-cpu-inside-qwen3-5-hj2phcwpi) · Medium · 1 upvotes · 0 comments --- Tags: [#llm](https://daily.dev/tags/llm), [#deep-learning](https://daily.dev/tags/deep-learning), [#gpu](https://daily.dev/tags/gpu), [#qwen](https://daily.dev/tags/qwen), [#cuda](https://daily.dev/tags/cuda) [View this post on daily.dev](https://daily.dev/posts/meet-qwengpu-qwen3-5-2b-with-45-compiled-gpu-layers-that-run-cuda-q0haljsm8) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA","url":"https://daily.dev/posts/meet-qwengpu-qwen3-5-2b-with-45-compiled-gpu-layers-that-run-cuda-q0haljsm8","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/meet-qwengpu-qwen3-5-2b-with-45-compiled-gpu-layers-that-run-cuda-q0haljsm8"},"datePublished":"2026-11-02T08:59:06.575Z","dateModified":"2026-11-02T08:59:40.039Z","description":"qwenGPU compiles a 4-lane SIMT GPU directly into the weights of Qwen3.5-2B, adding 45 untrained layers on top of Qwen's own 24, for 69 total. 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