NVIDIA is deploying its Vera CPU across internal EDA workflows used to design next-generation processors. Collaborating with Cadence and Synopsys, early testing shows up to 1.5x performance gains on formal verification (Cadence Jasper) and functional simulation (Synopsys VCS) workloads. Vera features 88 custom Olympus CPU cores, LPDDR5X memory, and NVIDIA's Scalable Coherent Fabric, making it well-suited for latency-sensitive and high-throughput verification tasks. NVIDIA plans to follow Vera with the next-generation Rosa CPU based on the Rigel core, creating a self-reinforcing loop where NVIDIA CPUs help design future NVIDIA chips.
Table of contents
Accelerating Critical EDA WorkloadsHighlighting Early Results With Cadence and SynopsysBringing Vera to the Design ProcessGoing From RTL to SiliconBuilding Future NVIDIA Chips With NVIDIA CPUs229 Impressions