--- title: NVIDIA's NVLink 6, Vera Rubin, and DSX platform: what... description: NVIDIA's AI Infra Summit announcements centered on efficiency framed as tokens per megawatt rather than raw throughput. The new DSX platform, tested by Lambda... canonical: https://daily.dev/posts/nvidia-s-nvlink-6-vera-rubin-and-dsx-platform-what-the-ai-infra-summit-actually-announced-b3zmwnzze twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: NVIDIA's NVLink 6, Vera Rubin, and DSX platform: what the AI Infra Summit actually announced | daily.dev og:description: NVIDIA's AI Infra Summit announcements centered on efficiency framed as tokens per megawatt rather than raw throughput. The new DSX platform, tested by Lambda... og:url: https://daily.dev/posts/nvidia-s-nvlink-6-vera-rubin-and-dsx-platform-what-the-ai-infra-summit-actually-announced-b3zmwnzze og:image: https://api.daily.dev/og/posts/b3zmwNZZE.png og:image:alt: NVIDIA's NVLink 6, Vera Rubin, and DSX platform: what the AI Infra Summit actually announced og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # NVIDIA's NVLink 6, Vera Rubin, and DSX platform: what the AI Infra Summit actually announced **[Collections](https://daily.dev/sources/collections)** · 4 min read · 0 upvotes · 0 comments ## Summary NVIDIA's AI Infra Summit announcements centered on efficiency framed as tokens per megawatt rather than raw throughput. The new DSX platform, tested by Lambda on HGX B200 servers, delivered 24% more token throughput and 23% better performance per watt, with projections of up to 40% more capacity on future Vera Rubin NVL72 systems. NVLink 6, the scale-up fabric connecting 72 Rubin GPUs, adds layered failure resiliency, including Dynamo Shadow Engine Recovery, which cut inference downtime from 283 seconds to 7.3 seconds on B200 GPUs. NVLink Fusion opens the fabric to third-party XPUs from partners like d-Matrix, AWS, Arm, Intel, and others, claiming 3x lower latency and 10x higher packet rates versus Ethernet. Power-side news included a demand-response trial with Silicon Valley Power, an 800V DC power architecture preview, and a planned 96-megawatt DSX Flex facility in Manassas, Virginia. ## Content ## The efficiency pitch: tokens per megawatt, not just tokens per second NVIDIA's Ian Buck used the AI Infra Summit to make a case that the right metric for AI factories isn't raw throughput—it's output per megawatt. The vehicle for that argument is DSX, a platform designed to squeeze more tokens out of the same power budget rather than simply adding more GPUs. Lambda ran the numbers on HGX B200 servers using DSX MaxLPS and found 24% more token throughput and 23% better performance per watt within the same power envelope. NVIDIA projects up to 40% more capacity for future Vera Rubin NVL72 deployments. SemiAnalysis AgentX benchmarks put the Vera Rubin NVL72 at up to 30x higher throughput per megawatt compared to the GB300 NVL72, which is a striking gap if it holds up in production workloads. Groq 3 LPX also joined the lineup, targeting ultralow-latency inference at the other end of the performance spectrum. A handful of startups—Perplexity, Daytona, ClickHouse, DeepInfra, Prime Intellect, Redpanda, Starburst, and Kinetica—shared benchmark results for the new Vera CPU, though the specifics varied by workload. ## NVLink 6: what's actually new NVLink 6 is the scale-up fabric connecting 72 Rubin GPUs inside the Vera Rubin NVL72 rack. The resiliency architecture is worth understanding in some detail, because at 72-GPU scale, failure handling becomes a real operational problem rather than an edge case. The design works in layers: - **Physical layer**: forward error correction (FEC), proactive link recovery (PLR), and unified PHY (UPHY) handle signal-level errors before they propagate - **Link layer**: credit-based flow control (CBFC) keeps the fabric lossless under congestion - **System design**: no single point of failure in the NVL72 topology - **Application layer**: software recovery handles what the hardware can't catch The application-layer piece is where the most interesting work is happening. NVIDIA's Dynamo Shadow Engine Recovery keeps pre-warmed replica processes running alongside primary inference engines. When a failure hits, the system switches to the replica instead of restarting from scratch. On B200 GPUs, that cuts inference downtime from 283 seconds to 7.3 seconds—a 38x reduction that matters a lot when you're running continuous inference workloads. NVIDIA also showed prototype NCCL support for multi-node CUDA checkpointing, which extends recovery options to training. ## NVLink Fusion: opening the fabric to third-party chips NVLink Fusion is the part of this story that has broader industry implications. It lets third-party XPUs connect into NVIDIA's NVLink fabric rather than being isolated on standard Ethernet. The numbers NVIDIA cites: 3x lower XPU-to-XPU latency than off-the-shelf Ethernet, 10x higher packet rates, and 3 TB/s per XPU of all-to-all bandwidth. For inference chips where interconnect latency directly affects model serving performance, those are meaningful differences. d-Matrix is the first announced adopter, planning to connect its next-generation Raptor XPUs into NVIDIA's infrastructure stack—NVLink scale-up networking, Spectrum-X scale-out networking, and MGX rack architecture together. Other partners include AWS, Arm, Intel, Fujitsu, SiFive, Marvell, MediaTek, and Samsung, covering Arm, x86, and RISC-V CPU architectures. The practical effect is that hyperscalers building custom silicon can now plug into NVIDIA's networking and rack ecosystem rather than building their own interconnect from scratch. NVLink Fusion also inherits the resiliency stack described above, which matters for anyone running custom XPUs at scale. ## Grid integration and power architecture One detail that didn't get much attention but probably should: NVIDIA's Eos AI factory participated in Silicon Valley Power's demand-response program using Emerald AI's Conductor software. The system automatically throttled low-priority workloads over 200 times to reduce grid load without interrupting inference. That's a real operational capability, not a demo—AI factories drawing tens of megawatts are going to face increasing pressure from grid operators, and automated demand response is one way to manage that relationship. NVIDIA also previewed an 800V DC power architecture and announced a dedicated DSX Flex deployment planned for a 96-megawatt facility in Manassas, Virginia. The 800V DC shift is significant for efficiency at datacenter scale; higher voltage means lower current for the same power, which reduces resistive losses in distribution. ## What this adds up to The through-line across all of this is that NVIDIA is trying to make the case that its platform—GPUs, networking, rack architecture, software, and now third-party chip integration—is more valuable than any individual component. The tokens-per-megawatt framing is partly marketing, but it's also a real engineering constraint as AI factories push into the hundreds of megawatts. Whether the benchmark numbers hold up in diverse production environments is a separate question, but the direction of the work is clear. ## Questions this post answers ### What is NVIDIA's Dynamo Shadow Engine Recovery and how much does it reduce inference downtime? Dynamo Shadow Engine Recovery keeps pre-warmed replica inference processes running alongside primary engines, so a failure triggers a switch to the replica instead of a full restart. On B200 GPUs this cuts inference downtime from 283 seconds to 7.3 seconds, a roughly 38x reduction, which matters for continuous inference workloads at scale. _Teams designing fault-tolerant inference clusters can follow resiliency techniques like this one on daily.dev._ ### What does NVLink Fusion let third-party chipmakers do with NVIDIA's infrastructure? NVLink Fusion lets third-party XPUs connect directly into NVIDIA's NVLink fabric instead of relying on standard Ethernet, claiming 3x lower XPU-to-XPU latency, 10x higher packet rates, and 3 TB/s of all-to-all bandwidth per XPU. d-Matrix is the first announced adopter for its Raptor XPUs, alongside partners AWS, Arm, Intel, Fujitsu, SiFive, Marvell, MediaTek, and Samsung spanning Arm, x86, and RISC-V architectures. _Engineers evaluating custom silicon versus NVIDIA's ecosystem can track interconnect news like this on daily.dev._ ### How much extra throughput does NVIDIA's DSX MaxLPS deliver on HGX B200 servers? Lambda measured 24% more token throughput and 23% better performance per watt on HGX B200 servers running DSX MaxLPS within the same power envelope, without adding more GPUs. NVIDIA separately projects up to 40% more capacity for future Vera Rubin NVL72 deployments using the same efficiency-focused approach. _daily.dev helps engineers weighing GPU efficiency claims keep up with benchmark data like this._ --- Tags: [#nvidia](https://daily.dev/tags/nvidia), [#gpu](https://daily.dev/tags/gpu), [#ai-infrastructure](https://daily.dev/tags/ai-infrastructure) [View this post on daily.dev](https://daily.dev/posts/nvidia-s-nvlink-6-vera-rubin-and-dsx-platform-what-the-ai-infra-summit-actually-announced-b3zmwnzze) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"NVIDIA's NVLink 6, Vera Rubin, and DSX platform: what the AI Infra Summit actually announced","url":"https://daily.dev/posts/nvidia-s-nvlink-6-vera-rubin-and-dsx-platform-what-the-ai-infra-summit-actually-announced-b3zmwnzze","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/nvidia-s-nvlink-6-vera-rubin-and-dsx-platform-what-the-ai-infra-summit-actually-announced-b3zmwnzze"},"datePublished":"2026-09-15T20:05:14.373Z","dateModified":"2026-09-15T20:06:14.361Z","description":"NVIDIA's AI Infra Summit announcements centered on efficiency framed as tokens per megawatt rather than raw throughput. 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