--- title: Qwenputer: A functioning, deterministic RISC-V CPU... description: A developer compiled a working 32-bit RISC-V CPU (RV32IM plus Zba and a bignum unit) directly into the weights of Qwen 3.5 4B. The CPU uses the model's Gated... canonical: https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm twitter:card: summary_large_image twitter:site: @dailydotdev og:type: website og:site_name: daily.dev og:title: Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5 | daily.dev og:description: A developer compiled a working 32-bit RISC-V CPU (RV32IM plus Zba and a bignum unit) directly into the weights of Qwen 3.5 4B. The CPU uses the model's Gated... og:url: https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm og:image: https://api.daily.dev/og/posts/KMWupQrxM.png og:image:alt: Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5 og:image:width: 1200 og:image:height: 630 og:locale: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5 **[Hacker News](https://daily.dev/sources/hn)** · 10 min read · 1 upvotes · 0 comments ## Summary A developer compiled a working 32-bit RISC-V CPU (RV32IM plus Zba and a bignum unit) directly into the weights of Qwen 3.5 4B. The CPU uses the model's Gated DeltaNet attention layers as exact, addressable RAM by setting the gate to 1, write strength to 1, and using one-hot keys. It runs C and MicroPython inside the forward pass, with no external tools, and has executed 18 million instructions free-running without an error. On DeepMind's arithmetic benchmarks it beats base Qwen and matches or exceeds giving Qwen a Python tool, for example scoring 100% on mul_div_multiple_longer versus 90% for base Qwen. The checkpoint is 18.8 GB, about double the base model, and runs on a single 24 GB GPU. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: ## Questions this post answers ### How can Gated DeltaNet layers in a model like Qwen 3.5 be used as exact addressable RAM? Set the forget gate to 1 so nothing fades, set the write strength (beta) to 1 so writes fully replace rather than blend, and use one-hot key encoding so each write touches exactly one row of the state matrix. This turns the Gated DeltaNet state into exact, addressable memory that stays a fixed size regardless of conversation length, unlike an attention KV cache. _Engineers exploring novel memory tricks for RNN-style attention can track experiments like this on daily.dev._ ### How does Qwenputer's in-model RISC-V CPU perform compared to giving Qwen 3.5 a Python tool for arithmetic? Qwenputer matches or beats the Python-tool approach on several benchmarks: 97.5% versus 95% on div_big, 100% versus 97.5% on mul_div_multiple_longer, and 100% versus 100% on NUPA long-integer arithmetic (up from 48.6% for base Qwen). Its printed numbers matched a reference machine on about 230,000 output positions with zero mismatches. _Developers weighing in-weight computation against tool-calling for LLM accuracy can follow benchmarks like these on daily.dev._ ### What are the practical limitations of running a CPU compiled into a language model's weights? The checkpoint balloons to 18.8 GB, roughly double the base Qwen 3.5 4B model, mostly due to zero padding from extra layers and wider hidden size. It requires a small driver called RvChat to load firmware and keep trace tokens isolated, so it can't run with a plain generate() call. It is also slow, since every instruction costs several decoded tokens, making large calculations take seconds; the batched executor manages about 3,200 CPU tokens per second on an L4 GPU. _Teams evaluating experimental LLM architectures for production tradeoffs can keep up with findings like this on daily.dev._ ## Community take How the wider developer community reacted, aggregated from 2 discussions and 69 comments across hackernews (as of 2026-10-29). **TL;DR:** Commenters are broadly fascinated by the technical cleverness of compiling a deterministic CPU into attention layers, with deep threads on how the DeltaNet-as-RAM trick works and tangents into interpretability research, while a vocal minority dismisses it as a pointless or overcomplicated stunt. **Sentiment:** 45% positive · 35% mixed · 20% skeptical **The case for** - Many find it a genuinely clever and fun demonstration of using DeltaNet attention as addressable RAM. - It's seen as a strong practical counter-example to the claim that LLMs are inherently non-deterministic. - Some think the underlying idea could point toward better integration of deterministic computation/tools into model internals for arithmetic and logic. - Several praise the write-up and project page as clear and well presented. **The pushback** - Some argue this is a 'rube Goldberg machine' or pointless since a real computer could just be used directly for computation. - One commenter dismisses it outright as 'slop' and questions whether the community can still filter quality content. - A rebuttal argues it doesn't actually refute LLM non-determinism since temperature=0 and similar tricks aren't realistic in production use. - Concern raised that continual training could overwrite or destroy the compiled CPU weights. **By community** - hackernews (mixed): Mostly admiring and curious about the technical mechanics, with tangents into interpretability research, but a notable contingent calls the project overcomplicated or low-value. **Hottest debate:** Whether this project is a meaningful technical achievement/counter-example to LLM non-determinism or just an overcomplicated, pointless stunt ('slop'). **Open questions** - Can continual training preserve a hard-coded subset of weights like this compiled CPU without overwriting it? - Can standard training methods learn this kind of structure from data (e.g. assembly) or does it require hard-coding? - Would this approach scale to more complex memory representations like vectors, or to other domains like the AdderBoard parameter-efficiency competition? **Highlights** > > Now, here's where our fun experiment starts. I found out that by setting the gate to 1,1 the write strength (beta) to 1,2 and using one-hot key encoding,3 every write we perform will overwrite exactly one row, and every one-hot query can retrieve an exact value. This means that the GDN layers themselves can work exactly as RAM, at a far lower cost than using normal attention as RAM, since a GDN head's state stays the same size however long the conversation gets, unlike attention's KV cache. So like... can't you use a computer as a computer without doing all that roundabout stuff? Like if you want to integrate a LLM with hard computation there's probably a more efficient way to do that. Or is this building towards "but can it run DOOM?" :) > — [andai on hackernews · 2 comments](https://news.ycombinator.com/item?id=50283954) > I’ve always wondered why we don’t add a few frozen “layers” to models that perform complex computations 2/3rds deep in the model. Some set of steerable fft + some common vector math operations could be reusable units of capability that the model learns to leverage during training. Given that models learn to use residual connections optimally, it can’t be hard for them to steer around the fixed computation layer when it’s not needed. I’m sure giant models invest a few layers in reproducing these functions, but surely smaller models can benefit? > — [rao-v on hackernews](https://news.ycombinator.com/item?id=50284012) > So this is yet another rube goldberg machine. We have gone down this path already in [0] and this is the same thing but overly complicated. This reason is "because LLMs". Why? [0] https://arxiv.org/abs/1410.5401 > — [rvz on hackernews · 1 comments](https://news.ycombinator.com/item?id=50283402) > This is slop. A community the size of HN with a democratic upvote system will never be able to filter out slop as advanced as this. I honestly think HN is on its deathbed. > — [ansk on hackernews · 1 comments](https://news.ycombinator.com/item?id=50283992) > Hm. I wonder if having a differentiable CPU in fixed weights might be useful-- you could propagate gradients through it. At inference time it could be replaced with a conventional implementation. I think the RNN sidebar does the reader a disservice. Ordinary casual attention can do exactly the same thing-- it's just less computationally efficient (state grows with the number of bits vs the number of accesses) and so not as useful for qwenputer compiler. > — [nullc on hackernews](https://news.ycombinator.com/item?id=50285174) > The real question is, do current training methods allow one to learn this when training on enough, say, assembly, or can the weights only be achieved via hard-coding? A fun and important thought experiment about the the space of nerual networks vs the image of current training methods. Most discourse conflates neural networks and trainable neural networks. > — [Ericson2314 on hackernews](https://news.ycombinator.com/item?id=50284325) **Source threads** - [hackernews](https://news.ycombinator.com/item?id=50282838) · 274 points · 69 comments - [hackernews](https://news.ycombinator.com/item?id=50274055) · 7 points · 0 comments ## Similar posts on daily.dev - [I dropped Qwen and Gemma for a 27B model that runs smoothly on my 8GB graphics card](https://daily.dev/posts/i-dropped-qwen-and-gemma-for-a-27b-model-that-runs-smoothly-on-my-8gb-graphics-card-h5gi3rwyo) · XDA Developers · 0 upvotes · 0 comments - [Getting Started with Qwen3.5 Vision-Language Models](https://daily.dev/posts/getting-started-with-qwen3-5-vision-language-models-jolnfokep) · DigitalOcean Community · 1 upvotes · 0 comments - [A 30B Qwen Model Walks Into a Raspberry Pi… and Runs in Real Time](https://daily.dev/posts/a-30b-qwen-model-walks-into-a-raspberry-pi-and-runs-in-real-time-2chvqxrcs) · Hacker News · 1 upvotes · 0 comments --- Tags: [#deep-learning](https://daily.dev/tags/deep-learning), [#ai-safety](https://daily.dev/tags/ai-safety), [#qwen](https://daily.dev/tags/qwen) [View this post on daily.dev](https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm) ```json {"@context":"https://schema.org","@graph":[{"@type":"Organization","@id":"https://daily.dev/#organization","name":"daily.dev","url":"https://daily.dev","logo":{"@type":"ImageObject","url":"https://daily.dev/apple-touch-icon.png","width":180,"height":180},"sameAs":["https://twitter.com/dailydotdev","https://github.com/dailydotdev","https://www.linkedin.com/company/daily-dev-ltd"]},{"@type":"WebSite","@id":"https://daily.dev/#website","url":"https://daily.dev","name":"daily.dev","publisher":{"@id":"https://daily.dev/#organization"},"potentialAction":{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https://daily.dev/search?q={search_term_string}"},"query-input":"required name=search_term_string"}}]} {"@context":"https://schema.org","@type":"TechArticle","headline":"Qwenputer: A functioning, deterministic RISC-V CPU inside Qwen3.5","url":"https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm","mainEntityOfPage":{"@type":"WebPage","@id":"https://daily.dev/posts/qwenputer-a-functioning-deterministic-risc-v-cpu-inside-qwen3-5-kmwupqrxm"},"datePublished":"2026-10-29T02:00:29.214Z","dateModified":"2026-10-29T06:32:12.295Z","description":"A developer compiled a working 32-bit RISC-V CPU (RV32IM plus Zba and a bignum unit) directly into the weights of Qwen 3.5 4B. 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