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title: RISC-V is now officially supported by CPython! | daily.dev
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# RISC-V is now officially supported by CPython!

**[Python Insider](https://daily.dev/sources/python)** · 3 min read · 0 upvotes · 0 comments

## Summary

RISC-V is now officially recognized as a tier 3 supported platform for CPython, following months of community work testing on real hardware, fixing architecture-specific bugs, and improving build support. The RISE Project provided RISC-V buildbot machines, and contributors including Ludovic Henry, Furkan Onder, and Emma Smith drove the effort, supported by the Sovereign Tech Agency. Next steps include integrating RISC-V into CPython's CI via RISE's RISC-V Runners initiative, pursuing tier 2 status, and exploring architecture-specific performance optimizations. Users with RISC-V hardware are encouraged to test builds and report issues.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://blog.python.org/2026/08/riscv-now-officially-supported>

## Questions this post answers

### Is RISC-V officially supported by CPython now?

Yes, RISC-V is now officially supported by CPython as a tier 3 platform under PEP 11. This follows extended community work including real-hardware testing, architecture-specific bug fixes, and build improvements, with the RISE Project providing dedicated RISC-V buildbot machines for ongoing testing.

_daily.dev helps developers porting or testing Python on new architectures track platform support changes like this._

### What does tier 3 platform support mean for CPython?

Tier 3 support in CPython's PEP 11 means a platform has official buildbots that must pass before a release, but failures do not block releases the way tier 1 or tier 2 failures would. RISC-V just reached this status, with plans to eventually pursue tier 2 support and bring RISC-V testing directly into CPython's CI for faster contributor feedback.

_developers tracking platform tiers for CPython can follow changes like this through daily.dev._

### Who supported RISC-V hardware testing for CPython development?

The RISE Project supplied several RISC-V machines used as buildbots for CPython testing and architecture-specific debugging. Key contributors included Ludovic Henry from RISE, Furkan Onder, and Emma Smith, with the effort also backed by a Sovereign Tech Agency fellowship supporting the work.

_daily.dev keeps developers following open-source infrastructure efforts like RISC-V hardware testing in one place._

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- [Announcing the RISE RISC-V Runners: free, native RISC-V CI on GitHub – Rise: RISC-V Software Ecosystem](https://daily.dev/posts/announcing-the-rise-risc-v-runners-free-native-risc-v-ci-on-github-rise-risc-v-software-ecosyst-ig2p7qyvd) · Hacker News · 0 upvotes · 0 comments
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---

Tags: [#python](https://daily.dev/tags/python), [#open-source](https://daily.dev/tags/open-source), [#architecture](https://daily.dev/tags/architecture), [#cpython](https://daily.dev/tags/cpython)

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