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title: SIMD-accelerated computer vision on a $2 microcontroller
description: A developer built a SIMD-accelerated FAST corner detector for the ESP32-S3 microcontroller, using its 128-bit vector instructions. The implementation processes...
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og:description: A developer built a SIMD-accelerated FAST corner detector for the ESP32-S3 microcontroller, using its 128-bit vector instructions. The implementation processes...
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# SIMD-accelerated computer vision on a $2 microcontroller

**[Hacker News](https://daily.dev/sources/hn)** · 6 min read · 1 upvotes · 0 comments

## Summary

A developer built a SIMD-accelerated FAST corner detector for the ESP32-S3 microcontroller, using its 128-bit vector instructions. The implementation processes a QVGA (320x240) frame in about 6ms, roughly double the speed of the reference implementation. Throughput rose 220%, from 5.1MP/s to 11.2MP/s. Along the way the author worked around the chip's lack of misaligned reads, its signed-only 8-bit comparisons, and saturating arithmetic, using an XOR with 0x80 trick to shift unsigned pixel values into a usable signed range. The result is fast enough for a 30fps VGA computer vision stream on a $2 chip.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://shraiwi.com/blog/simd-fast-esp32s3>

## Questions this post answers

### How do I do SIMD arithmetic with unsigned 8-bit pixel values on the ESP32-S3 when comparisons only work on signed bytes?

XOR each unsigned byte with 0x80 before comparing or doing arithmetic on it. This shifts the range from [0, 255] to a linear signed range of [-128, 127], since x - 128 equals x XOR 0x80. It avoids the saturating subtraction instruction clamping values above 127 to -128 instead of wrapping correctly.

_Developers hitting the same ESP32-S3 SIMD quirks can track embedded computer vision write-ups like this on daily.dev._

### What throughput can the FAST corner detector achieve on an ESP32-S3 using its SIMD instructions?

A SIMD-accelerated FAST feature detector on the ESP32-S3 reached 11.2 megapixels per second, up from 5.1MP/s for the scalar reference implementation, a roughly 220% improvement. It processes a QVGA (320x240) frame in about 6ms, fast enough for a 30fps VGA realtime computer vision stream on a microcontroller costing around $2.

_Benchmarks like this help engineers evaluating cheap microcontrollers for computer vision tasks on daily.dev._

### How do I handle misaligned memory reads on the ESP32-S3 when its instruction set doesn't allow direct misaligned loads?

Use the chip's instruction for extracting a slice from two concatenated registers. Read the two aligned blocks adjacent to the misaligned target, then extract the needed slice spanning both of them, since the ESP32-S3's SIMD ISA forbids direct misaligned reads but supports this register-slicing operation.

_Engineers writing ESP32-S3 assembly can keep up with low-level workarounds like this on daily.dev._

## Community take

How the wider developer community reacted, aggregated from 2 discussions and 52 comments across hackernews, lobsters (as of 2026-10-26).

**TL;DR:** Most discussion drifted away from the technical post itself into tangents about cheap ESP32 boards, home automation projects, and nostalgia for old PCs, with only a handful of comments engaging directly with the SIMD work or its practical usefulness.

**Sentiment:** 30% positive · 45% mixed · 25% skeptical

**The case for**

- Some found the ESP32-S3's capability impressive relative to its price and compared it favorably to vintage PCs.
- One commenter noted LLMs can be useful for exploring SIMD optimizations by iterating against real hardware benchmarks.

**The pushback**

- Several pointed out the article's '220% increase' claim is a math error since 5.1 to 11.2 MP/s is roughly a 120% increase, not 220%.
- One questioned how useful the corner detection result actually is without example output showing detection quality.
- A debate arose over whether using built-in vector instructions really counts as 'SIMD acceleration' versus just normal instruction usage.
- Multiple commenters noted LLMs struggle to correctly recall or apply the specific SIMD instruction details for this chip.

**By community**

- hackernews (mixed): Discussion splintered into tangents about ESP32 pricing and projects, a semantic debate about what counts as SIMD acceleration, a math nitpick on the stated percentage increase, and brief skepticism about the demo's practical usefulness.
- lobsters (mixed): No comments were provided for this discussion.

**Hottest debate:** Whether using the chip's built-in vector instructions truly qualifies as 'SIMD acceleration' or is just normal instruction use.

**Open questions**

- What exactly can the corner detector reliably detect in practice, and at what resolution or accuracy?

**Highlights**

> The engineering seems impressive, but how useful is the result? What can you detect exactly with it in real time? Detecting corners, but to what resolution/detail, a picture with a result would have been helpful to understand the capability. edit: missed this link, this is what this is about https://en.wikipedia.org/wiki/Features_from_accelerated_segm...
> — [lukan on hackernews](https://news.ycombinator.com/item?id=50248992)

> nit: 5.1MP/s to 11.2MP/s is not an increase of 220%, it's an increase of 120%. it's 2.2x faster, but percentage increase starts at 0%, not 100%. 100% faster is double, 200% faster is triple.
> — [peesem on hackernews · 2 comments](https://news.ycombinator.com/item?id=50245771)

> Why is it still called SIMD-accelerated, if these are now just normal instructions. You just have to take a little bit more effort into restructuring your algorithms to make use of them.
> — [varispeed on hackernews · 1 comments](https://news.ycombinator.com/item?id=50248359)

> IME, they’re still pretty bad at getting specific implementation details of SIMD correct. The best I’ve done so far is to harness them to an actual piece of hardware and have them iterate until they see performance improvements but 1) Goodhart’s law, they tend to overfit the benchmark suite and 2) the resulting SIMD often becomes illegible.
> — [ballmerpoint on hackernews · 2 comments](https://news.ycombinator.com/item?id=50246441)

> Interesting. Since this was implemented on the S3, which uses the ISA XTensa LX instead of the RISC-V of most newer ESP32 series chips, I looked into how Espressif is handling SIMD on the latter ISA. Apparently it is only present in limited fashion as a processor extension on the P4 and S31 [0]. The S31 datasheet claims SIMD [1] and the P4 datasheet [2] files them as "Processor Instruction Extensions." 0. https://bitbanksoftware.blogspot.com/2026/04/esp32-p4-simd-e... 1. https://documentation.espressif.com/esp32-s31_datasheet_en.p... 2. https://documentation.espressif.com/esp32-p4_technical_refer...
> — [adolph on hackernews](https://news.ycombinator.com/item?id=50249184)

**Source threads**

- [hackernews](https://news.ycombinator.com/item?id=50236681) · 148 points · 52 comments
- [lobsters](https://lobste.rs/s/qsmmke/simd_accelerated_computer_vision_on_2) · 11 points · 0 comments

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---

Tags: [#computer-vision](https://daily.dev/tags/computer-vision), [#embedded](https://daily.dev/tags/embedded), [#assembly](https://daily.dev/tags/assembly)

[View this post on daily.dev](https://daily.dev/posts/simd-accelerated-computer-vision-on-a-2-microcontroller-shxpf6zls)

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