--- title: "Some Elements Of Intel APX Not Proving Beneficial On Nova Lake / Diamond Rapids" url: https://daily.dev/posts/some-elements-of-intel-apx-not-proving-beneficial-on-nova-lake-diamond-rapids-wml1usvkv source_url: https://www.phoronix.com/news/Intel-APX-GCC-Disabling-Bits type: article source: "Phoronix" published: 2026-06-01T10:23:54.605Z updated: 2026-06-01T10:24:24.632Z tags: ["intel", "compiler-optimization"] reading_time: 3 upvotes: 0 comments: 0 language: en --- > ## Documentation Index > Fetch the complete documentation index at: https://daily.dev/llms.txt > Use this file to discover all available pages before exploring further. # Some Elements Of Intel APX Not Proving Beneficial On Nova Lake / Diamond Rapids **[Phoronix](https://daily.dev/sources/phoronix)** · 3 min read · 0 upvotes · 0 comments ## Summary GCC has received two compiler tuning patches that disable certain Intel Advanced Performance Extensions (APX) features for upcoming Nova Lake and Diamond Rapids processors. Specifically, memory-form NDD (New Data Destination) instructions and SETcc.ZU encoding are being turned off by default because benchmarks show no performance benefit on these architectures. While APX brings significant improvements like doubling general-purpose registers, not all new features translate to real-world gains on these cores. ## Full article daily.dev links to this article rather than hosting it. Read it at the original source: --- Tags: [#intel](https://daily.dev/tags/intel), [#compiler-optimization](https://daily.dev/tags/compiler-optimization) [View this post on daily.dev](https://daily.dev/posts/some-elements-of-intel-apx-not-proving-beneficial-on-nova-lake-diamond-rapids-wml1usvkv)