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# Stacking Chips Sideways Gives AI More Memory

**[IEEE Spectrum](https://daily.dev/sources/ieeespectrum)** · 6 min read · 0 upvotes · 0 comments

## Summary

Researchers are exploring sideways or vertical DRAM die stacking as an alternative to traditional tall HBM stacks, which face thermal and bandwidth limitations. Two approaches were presented at IEEE VLSI Symposium: V-Die from South Korean researchers at UNIST, which eliminates through-silicon vias to free up memory cell area and predicts an 82% speed boost over HBM4 with microfluidic cooling keeping dies at 45°C; and MOSAIC from Japanese universities, which uses inductive coupling transceivers to ease alignment tolerances and can fit 98 dies per cube for 294 GB, potentially scaling to 882 GB with thinner dies. Both aim to address the growing memory bottleneck for large AI models while managing heat more effectively than current vertical stacking approaches.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://spectrum.ieee.org/stacking-chips-sideways>

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Tags: [#hardware](https://daily.dev/tags/hardware), [#gpu](https://daily.dev/tags/gpu)

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