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title: TorchTPU: Running PyTorch Natively on TPUs at Google Scale
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# TorchTPU: Running PyTorch Natively on TPUs at Google Scale

**[Google Developers](https://daily.dev/sources/googledevs)** · 7 min read · 0 upvotes · 0 comments

## Summary

Google's TorchTPU is a new engineering stack enabling PyTorch to run natively on TPU hardware with minimal code changes. Built on an 'Eager First' philosophy using PyTorch's PrivateUse1 interface, it offers three execution modes: Debug Eager (synchronous, for debugging), Strict Eager (asynchronous, mirrors standard PyTorch), and Fused Eager (auto-fuses operations for 50–100%+ performance gains). For peak performance, it integrates with torch.compile via XLA as the backend compiler, translating PyTorch operators to StableHLO IR. TorchTPU supports DDP, FSDPv2, and DTensor for distributed workloads, and adds MPMD support to handle divergent execution across ranks — a key limitation of its predecessor PyTorch/XLA. Custom kernels via Pallas and JAX are supported. The 2026 roadmap includes bounded dynamism for dynamic shapes, precompiled kernel libraries, and broader ecosystem integration.

## Full article

daily.dev links to this article rather than hosting it. Read it at the original source: <https://developers.googleblog.com/torchtpu-running-pytorch-natively-on-tpus-at-google-scale/>

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---

Tags: [#machine-learning](https://daily.dev/tags/machine-learning), [#pytorch](https://daily.dev/tags/pytorch)

[View this post on daily.dev](https://daily.dev/posts/torchtpu-running-pytorch-natively-on-tpus-at-google-scale-wnrth1jyb)

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