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title: TSMC drafts 3D DRAM plans at Nvidia's request | daily.dev
description: TSMC has started drafting plans to make 3D DRAM memory chips, and Nvidia is the one asking, according to The Information. If it goes ahead, TSMC would compete...
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# TSMC drafts 3D DRAM plans at Nvidia's request

**[Collections](https://daily.dev/sources/collections)** · 2 min read · 1 upvotes · 0 comments

## Summary

TSMC has started drafting plans to make 3D DRAM memory chips, and Nvidia is the one asking, according to The Information. If it goes ahead, TSMC would compete with Samsung, SK Hynix and Micron, the three suppliers Nvidia currently buys advanced memory from. 3D DRAM stacks memory cells vertically for more capacity, and TSMC could build new factories or convert an existing plant. The effort is led by VP Hsu Kuo-chin, who oversees advanced packaging. AI data centers keep pushing memory prices up, and Micron expects the shortage to last into 2028. A fourth source would give Nvidia more supply and weaken the pricing power of the other three. Nothing has been announced; the plans are still in the drafting stage.

## Content

A report from The Information said TSMC was drafting plans to make 3D DRAM at Nvidia's request. TSMC says it will stay a pure logic foundry.

## What was reported

According to the report, TSMC could build new factories or convert an existing plant. The effort was said to be led by VP Hsu Kuo-chin, who oversees advanced packaging. That would put TSMC up against Samsung, SK Hynix and Micron while AI data centers keep pushing memory prices up. Micron expects the shortage to last into 2028.

3D DRAM stacks memory cells vertically to get more capacity per wafer.

## Why Nvidia might want it

Right now Nvidia can buy advanced memory from only three companies. A fourth supplier would mean more supply and less pricing power for the other three. The request would also fit with Nvidia's reported October requirement that all three memory makers use TSMC's 3nm process for its custom HBM base dies. That lets Nvidia shift order volume between them during shortages.

As @rohanpaul_ai noted, 3D DRAM could give TSMC an opening because no incumbent has turned it into a mature product yet, and TSMC holds its own vertical DRAM patents.

## Why the denial is plausible

- Even Micron plans at least four more planar nodes before adopting 3D DRAM. A TSMC entry therefore couldn't ease shortages for at least five years.
- TSMC doesn't have a competitive planar DRAM process to build from.
- It already earns money from memory without making it, by building HBM base dies and bonding memory to logic with SoIC hybrid bonding.

A separate Korean report says Nvidia wants Samsung, SK hynix and Micron to build its custom NVHBM base dies on TSMC's 3nm process. That would give TSMC memory-related revenue without DRAM's price swings, which may be the more realistic route.

## Questions this post answers

### Why does Nvidia want TSMC to make 3D DRAM memory chips?

Nvidia wants a fourth advanced memory supplier to reduce reliance on Samsung, SK Hynix and Micron and weaken their pricing power. AI data center demand keeps pushing memory prices up, and Micron expects the shortage to last into 2028. TSMC is drafting plans for 3D DRAM, which stacks memory cells vertically for more capacity, led by VP Hsu Kuo-chin.

_Anyone tracking AI hardware supply constraints can follow memory market shifts like this on daily.dev._

### Is TSMC going to manufacture DRAM memory chips?

TSMC has started drafting plans to produce 3D DRAM at Nvidia's request, but nothing has been announced and the effort is still in the drafting stage. TSMC could build new factories or convert an existing plant, and it already holds its own vertical DRAM patents, making it a plausible new entrant since no incumbent has yet made 3D DRAM a mature product.

_Developers weighing hardware cost and supply risk for AI projects can track updates like this on daily.dev._

## Community take

How the wider developer community reacted, aggregated from 1 discussion and 4 comments across x (as of 2026-11-09).

**TL;DR:** Commenters are skeptical of the timeline and motives behind the report, questioning the cited five-year estimate and noting TSMC's denial plausibly reflects conflict with its own HBM partners while memory, not logic, looks like the real bottleneck for Nvidia.

**Sentiment:** 0% positive · 30% mixed · 70% skeptical

**The pushback**

- The widely cited five-year timeline estimate lacks a clear sourced cadence and is questioned by commenters.
- Entering 3D DRAM would put TSMC in direct competition with its own HBM partners, making the reported plan and denial seem contradictory.
- CoWoS and advanced packaging capacity, not DRAM cell tech, may be the actual bottleneck.

**By community**

- x (skeptical): Replies question the report's assumptions and suggest the real constraint is packaging and memory supply rather than TSMC's logic prowess.

**Hottest debate:** Whether the real bottleneck is DRAM manufacturing itself or TSMC's advanced packaging/stacking capability.

**Open questions**

- Where does the five-year timeline estimate actually come from and what node cadence does it assume?
- If TSMC enters 3D DRAM, does the bottleneck shift to packaging and base-die control rather than DRAM cell technology?

**Highlights**

> @rohanpaul_ai The denial makes sense: 3D DRAM would put TSMC up against its own HBM partners while CoWoS is still the bottleneck. The more telling part is Nvidia shopping around at all. It says memory, not logic, is the constraint they're worried about for 2027-28.
> — [Blacmuya on x](https://x.com/Blacmuya/status/2119232411372581320)

> @rohanpaul_ai Even if TSMC stays logic-only, 3D DRAM would still lean on its advanced packaging and hybrid bonding. Does the real bottleneck shift from DRAM cells to who controls the stacking and base-die process?
> — [Richdorai on x](https://x.com/Richdorai/status/2119210087726436521)

> @rohanpaul_ai where does the 5 year number come from? is it Micron's 4 planar nodes at a node a year? DRAM nodes have been moving slower than that, so curious what cadence they assumed
> — [Chahatusharma on x](https://x.com/Chahatusharma/status/2119197486929826010)

**Source threads**

- [x](https://x.com/rohanpaul_ai/status/2119192725782479047) · 0 points · 4 comments

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---

Tags: [#nvidia](https://daily.dev/tags/nvidia), [#supply-chain](https://daily.dev/tags/supply-chain)

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