Microprogramming — a structured approach to state machine design pioneered by Maurice Wilkes in 1951 — can significantly reduce FPGA resource utilization. Faced with a 100%-utilized Xilinx FPGA whose 16550-compatible UARTs needed deeper FIFOs, the author replaced an ABEL HDL state machine with a microprogrammed ROM-based controller. By time-multiplexing a single Block RAM for both receive and transmit FIFOs and storing pointers/counters in LUT RAM, the redesign freed approximately 25% of the device's logic resources. A complete microprogram word table and state sequences are provided, along with Verilog reimplementations of both approaches. Resource comparison tables show the microprogrammed design uses roughly half the occupied slices (63 vs 127) compared to a standard synthesized state machine, though it runs about 8.5% slower. A microassembler tool is available on GitHub to assist with generating microprogram ROMs.

22m read timeFrom embeddedrelated.com
Post cover image
Table of contents
IntroductionThe ProblemThe Standard ApproachThe Microprogrammed ApproachA Verilog Implementation of Both ApproachesSummaryWhat's NextReferences